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ADIN2111CCPZ-R7 Folha de dados(PDF) 110 Page - Analog Devices

Nome de Peças ADIN2111CCPZ-R7
Descrição Electrónicos  Low Complexity, 2-Port Ethernet Switch with Integrated 10BASE-T1L PHYs
PDF  129 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
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Data Sheet
ADIN2111
REGISTERS
analog.com
Rev. A | 110 of 129
10BASE-T1 Autonegotiation Status Register
Device Address: 0x07; Register Address: 0x020F, Reset: 0x0000, Name: AN_B10_LP_ADV_ABILITY
This address corresponds to the 10BASE-T1 autonegotiation status register specified in Clause 45.2.7.26 of Standard 802.3cg.
Table 205. Bit Descriptions for AN_B10_LP_ADV_ABILITY
Bits
Bit Name
Description
Reset
Access
15
AN_B10_LP_ADV_B10L
10BASE-T1L Ability. This is a duplicate of the AN_LP_ADV_B10L bit.
0x0
R
14
AN_B10_LP_ADV_B10L_EEE
10BASE-T1L EEE Ability. This is a duplicate of the
AN_LP_ADV_B10L_EEE bit.
0x0
R
13
AN_B10_LP_ADV_B10L_TX_LVL_HI_ABL
10BASE-T1L High Level Transmit Operating Mode Ability. This is a
duplicate of the AN_LP_ADV_B10L_TX_LVL_HI_ABL bit.
0x0
R
12
AN_B10_LP_ADV_B10L_TX_LVL_HI_REQ
10BASE-T1L High Level Transmit Operating Mode Request. This is a
duplicate of the AN_LP_ADV_B10L_TX_LVL_HI_REQ bit.
0x0
R
[11:8]
RESERVED
Reserved.
0x0
R
7
AN_B10_LP_ADV_B10S_FD
Link Partner 10BASE-T1S Full Duplex Ability. This is a duplicate of the
AN_LP_ADV_B10S_FD bit.
0x0
R
6
AN_B10_LP_ADV_B10S_HD
Link Partner 10BASE-T1S Half Duplex Ability. This is a duplicate of the
AN_LP_ADV_B10S_HD bit.
0x0
R
[5:0]
RESERVED
Reserved.
0x0
R
Autonegotiation Force Mode Enable Register
Device Address: 0x07; Register Address: 0x8000, Reset: 0x0000, Name: AN_FRC_MODE_EN
Note that the effect of this register is superseded by the AN_EN bit, which enables the autonegotiation process. If autonegotiation is disabled
(AN_EN = 0), forced mode is engaged if AN_FRC_MODE_EN is 1.
Table 206. Bit Descriptions for AN_FRC_MODE_EN
Bits
Bit Name
Description
Reset
Access
[15:1]
RESERVED
Reserved.
0x0
R
0
AN_FRC_MODE_EN
Autonegotiation Forced Mode. Enables forced mode functionality.
0x0
R/W
Extra Autonegotiation Status Register
Device Address: 0x07; Register Address: 0x8001, Reset: 0x0000, Name: AN_STATUS_EXTRA
This register is provided in addition to AN_STATUS.
Table 207. Bit Descriptions for AN_STATUS_EXTRA
Bits
Bit Name
Description
Reset
Access
[15:11]
RESERVED
Reserved.
0x0
R
10
AN_LP_NP_RX
Next Page Request Received from Link Partner.
0x0
R LH
9
AN_INC_LINK
Incompatible Link Indication. This corresponds to the incompatible link state of IEEE
Standard 802.3 Subclause 98.5.1. Its value is set by the priority resolution function run on
entering the autonegotiation good check state.
0x0
R
[8:7]
AN_TX_LVL_RSLTN
Autonegotiation Tx Level Result. Transmit level high/low resolution result, determined as per
IEEE Standard 802.3cg Subclause 146.6.4. This is encoded as follows:
0x0
R
0: not run.
2: success, low transmit levels (1.0 V p-p) selected.
3: success, high transmit levels (2.4 V p-p) selected.



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