ADIN2111CCPZ-R7 datasheet(52/129 Pages) AD

52 / 129 page

Data Sheet

ADIN2111

SWITCH SPI

analog.com

Rev. A | 52 of 129

SRAM ECC Error

When writing a frame to one of the ADIN2111 PHY FIFOs, the size

of the frame is inserted in a 16-bit word at the front of the frame and

written to the FIFO. A 5-bit ECC is placed alongside the size field.

When this location is read from the SRAM, the ECC is checked. If

a double bit error is detected, the RX_ECC_ERR or TX_ECC_ERR

bits of the STATUS1 register are set to 1. If a double bit error is

detected on reading a frame header from the receive FIFO, the

frame is not transmitted.

In response to an ECC error, a FIFO automatically clears. All

frames in the FIFO are lost, transmission stops, and a bad CRC is

appended to the frame that transmitted. The next frame received is

written to a FIFO.

Transmit Overflow Error

If the host attempts to write to the transmission FIFO but there is

not enough space, the host transmission FIFO overflow bit field

asserts (TXBOE). The software checks the space available in the

transmission FIFO by reading the transmission FIFO space register

(TX_SPACE) before attempting to write to it.

If this error occurs, the frame is automatically dumped, and the

software has no other requirement than to clear the TXBOE status

bit. Note that frames dropped because of a transmission FIFO

overflow are not counted in the statistics counters.

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