ADIN2111CCPZ-R7 datasheet(78/129 Pages) AD

78 / 129 page

Data Sheet

ADIN2111

REGISTERS

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Rev. A | 78 of 129

P1 Rx PHY Error Count Register

Address: 0xA7, Reset: 0x00000000, Name: P1_RX_PHY_ERR_CNT

Table 105. Bit Descriptions for P1_RX_PHY_ERR_CNT

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_RX_PHY_ERR_CNT

Rx PHY Error Count.

0x0

P1 Tx Frame Count Register

Address: 0xA8, Reset: 0x00000000, Name: P1_TX_FRM_CNT

Table 106. Bit Descriptions for P1_TX_FRM_CNT

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_TX_FRM_CNT

Tx Frame Count.

0x0

P1 Tx Broadcast Frame Count Register

Address: 0xA9, Reset: 0x00000000, Name: P1_TX_BCAST_CNT

Table 107. Bit Descriptions for P1_TX_BCAST_CNT

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_TX_BCAST_CNT

Tx Broadcast Frame Count.

0x0

P1 Tx Multicast Frame Count Register

Address: 0xAA, Reset: 0x00000000, Name: P1_TX_MCAST_CNT

Table 108. Bit Descriptions for P1_TX_MCAST_CNT

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_TX_MCAST_CNT

Tx Multicast Frame Count.

0x0

P1 Tx Unicast Frame Count Register

Address: 0xAB, Reset: 0x00000000, Name: P1_TX_UCAST_CNT

Table 109. Bit Descriptions for P1_TX_UCAST_CNT

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_TX_UCAST_CNT

Tx Unicast Frame Count.

0x0

P1 Rx Frames Dropped Due to FIFO Full Register

Address: 0xAC, Reset: 0x00000000, Name: P1_RX_DROP_FULL_CNT

Table 110. Bit Descriptions for P1_RX_DROP_FULL_CNT

Bits

Bit Name

Description

Reset

Access

[31:0]

P1_RX_DROP_FULL_CNT

Rx Frames Dropped Due to FIFO Full. Note that on LES, if a received frame is destined for

both the host and other port (a flooded frame), and the frame is not forwarded to one of the

destination FIFOs because it is full, the frame is not counted as a dropped frame.That is, if the

frame is flooded, P1_RX_DROP_FULL_CNT only increments if both FIFOs are full.

0x0

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