Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

ADIN2111CCPZ-R7 Folha de dados(PDF) 104 Page - Analog Devices

Nome de Peças ADIN2111CCPZ-R7
Descrição Electrónicos  Low Complexity, 2-Port Ethernet Switch with Integrated 10BASE-T1L PHYs
PDF  129 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

ADIN2111CCPZ-R7 Folha de dados(HTML) 104 Page - Analog Devices

Back Button ADIN2111CCPZ-R7 Datasheet HTML 100Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 101Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 102Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 103Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 104Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 105Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 106Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 107Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 108Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 104 / 129 page
background image
Data Sheet
ADIN2111
REGISTERS
analog.com
Rev. A | 104 of 129
Table 190. Bit Descriptions for AN_CONTROL
Bits
Bit Name
Description
Reset
Access
[15:13]
RESERVED
Reserved.
0x0
R/W SC
12
AN_EN
Autonegotiation Enable. When this bit is set to 1, autonegotiation is enabled. Autonegotiation is enabled by
default and it is strongly recommended that it is always enabled.
0x1
R/W
[11:10]
RESERVED
Reserved.
0x0
R
9
AN_RESTART
Autonegotiation Restart. Setting this bit to 1 restarts the autonegotiation process. This bit is self clearing and
it returns a value of one until the autonegotiation process is initiated.
0x0
R/W SC
[8:0]
RESERVED
Reserved.
0x0
R
BASE-T1 Autonegotiation Status Register
Device Address: 0x07; Register Address: 0x0201, Reset: 0x0008, Name: AN_STATUS
This address corresponds to the BASE-T1 autonegotiation status register specified in Clause 45.2.7.20 of Standard 802.3.
Table 191. Bit Descriptions for AN_STATUS
Bits
Bit Name
Description
Reset
Access
[15:7]
RESERVED
Reserved.
0x0
R
6
AN_PAGE_RX
Page Received. This bit is set to indicate that a new link codeword has been received and stored
in the AN_LP_ADV_ABILITY_x register or the AN_LP_NEXT_PAGE register. The contents of the
AN_LP_ADV_ABILITY_x are valid when this bit is set the first time during autonegotiation. This bit
resets to 0 on a read of the AN_STATUS register.
0x0
R LH
5
AN_COMPLETE
Autonegotiation Complete. When this bit is read as 1, the autonegotiation process is complete,
the PHY link is up, and that the contents of the AN_ADV_ABILITY_x and AN_LP_ADV_ABILITY_x
registers are valid. This bit returns 0 if the autonegotiation is disabled, clearing the AN_EN bit.
0x0
R
4
AN_REMOTE_FAULT
Autonegotiation Remote Fault. Remote fault set in base page received from link partner.
0x0
R LH
3
AN_ABLE
Autonegotiation Ability. When this bit is read as 1, it indicates that the PHY is able to perform
autonegotiation.
0x1
R
2
AN_LINK_STATUS
Link Status. When read as 1, this bit indicates that a valid link is established. If this bit reads 0, the
link failed since the last time it was read.
0x0
R LL
[1:0]
RESERVED
Reserved.
0x0
R
BASE-T1 Autonegotiation Advertisement Register, Bits[15:0]
Device Address: 0x07; Register Address: 0x0202, Reset: 0x0001, Name: AN_ADV_ABILITY_L
This address corresponds to the BASE-T1 autonegotiation advertisement register, Bits[15:0], specified in Clause 45.2.7.21 of Standard 802.3.
Table 192. Bit Descriptions for AN_ADV_ABILITY_L
Bits
Bit Name
Description
Reset
Access
15
AN_ADV_NEXT_PAGE_REQ
Next Page Request. This bit indicates to the link partner that the PHY wants to send a
next page. See IEEE Standard 802.3 Subclause 98.2.1.2.9.
0x0
R/W
14
AN_ADV_ACK
Acknowledge (ACK). This bit indicates that the device has received the link codeword of
its link partner. See IEEE Standard 802.3 Subclause 98.2.1.2.8.
0x0
R
13
AN_ADV_REMOTE_FAULT
Remote Fault. See IEEE Standard 802.3 Subclause 98.2.1.2.7.
0x0
R/W
12
AN_ADV_FORCE_MS
Force Master/Slave Configuration. This bit allows the PHY to force its master/slave con-
figuration. When this bit is set as 0, the master/slave configuration is a preferred mode.
(The configuration in AN_ADV_MST is a preferred configuration.) If this bit is set to 1,
0x0
R/W



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Folha de dados Download

Go To PDF Page


Ligação URL



ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   Link para a ficha técnica    |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com