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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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ADIN2111CCPZ-R7 Folha de dados(PDF) 101 Page - Analog Devices |
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ADIN2111CCPZ-R7 Folha de dados(HTML) 101 Page - Analog Devices |
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101 / 129 page  Data Sheet ADIN2111 REGISTERS analog.com Rev. A | 101 of 129 Table 178. Bit Descriptions for B10L_TEST_MODE_CNTRL (Continued) Bits Bit Name Description Reset Access 011: Test Mode 3—normal operation in idle mode. When Test Mode 3 is enabled, the PHY transmits as in nontest operation and in the master data mode with data set to normal interframe idle signals. [12:0] RESERVED Reserved. 0x0 R 10BASE-T1L PMA Link Status Register Device Address: 0x01; Register Address: 0x8302, Reset: 0x0000, Name: B10L_PMA_LINK_STAT This address can be read to determine the 10BASE-T1L PMA link status. Reading B10L_PMA_LINK_STAT clears the latching condition of these bits. Table 179. Bit Descriptions for B10L_PMA_LINK_STAT Bits Bit Name Description Reset Access [15:10] RESERVED Reserved. 0x0 R 9 B10L_REM_RCVR_STAT_OK_LL 10BASE-T1L Remote Receiver Status OK Latch Low. Latched low version of B10L_REM_RCVR_STAT_OK. 0x0 R LL 8 B10L_REM_RCVR_STAT_OK 10BASE-T1L Remote Receiver Status OK. When read as 1, this bit indicates that the remote receiver status is OK. 0x0 R 7 B10L_LOC_RCVR_STAT_OK_LL 10BASE-T1L Local Receiver Status OK Latch Low. Latched low version of B10L_LOC_RCVR_STAT_OK. 0x0 R LL 6 B10L_LOC_RCVR_STAT_OK 10BASE-T1L Local Receiver Status OK. When read as 1, this bit indicates that the local receiver status is OK. 0x0 R 5 B10L_DSCR_STAT_OK_LL BASE-T1L Descrambler Status OK Latch Low. When read as 1, this bit indicates that the descrambler status is OK. 0x0 R LL 4 B10L_DSCR_STAT_OK 10BASE-T1L Descrambler Status OK. When read as 1, this bit indicates that the descrambler status is OK. 0x0 R [3:2] RESERVED Reserved. 0x0 R 1 B10L_LINK_STAT_OK_LL Link Status OK Latch Low. When read as 1, this bit indicates that the link status is OK. 0x0 R LL 0 B10L_LINK_STAT_OK Link Status OK. When read as 1, this bit indicates that the link status is OK. 0x0 R MSE Value Register Device Address: 0x01; Register Address: 0x830B, Reset: 0x0000, Name: MSE_VAL Table 180. Bit Descriptions for MSE_VAL Bits Bit Name Description Reset Access [15:0] MSE_VAL MSE Value. Note that the LSB weight is 2−18. When computing a signal-to-noise ratio (SNR) value, the mean 10BASE-T1L idle symbol power is 0.64422. 0x0 R PCS Control 1 Register Device Address: 0x03; Register Address: 0x0000, Reset: 0x0000, Name: PCS_CNTRL1 This address corresponds to the PCS Control Register 1 specified in Clause 45.2.3.1 of Standard 802.3. Table 181. Bit Descriptions for PCS_CNTRL1 Bits Bit Name Description Reset Access 15 PCS_SFT_RST PCS Software Reset. Mirrors PMA_SFT_RST. 0x0 R/W SC |
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