MAXQ3183-RAN+ datasheet(39/102 Pages) MAXIM

39 / 102 page

Low-Power, Multifunction, Polyphase AFE

with Harmonics and Tamper Detect

______________________________________________________________________________________

Phase-Angle Compensation, Medium Range, Phase X = A/B/C (X.PA1)

(A: 0x140, B: 0x22C, C: 0x318)

This signed register contains the angle, as a fraction of one radian, to add to the measured phase angle when the

measured current is between the values given in I1THR and I2THR. This signed value ranges from -0.5 radian (at a

value of 0x8000) to +(0.5 - 2-16) radian (at a value of 0x7FFF).

Phase-Angle Compensation, Low Range, Phase X = A/B/C (X.PA2)

(A: 0x142, B: 0x22E, C: 0x31A)

This signed register contains the angle, as a fraction of one radian, to add to the measured phase angle when the

measured current is below the value given in I2THR. This signed value ranges from -0.5 radian (at a value of 0x8000)

to +(0.5 - 2-16) radian (at a value of 0x7FFF).

Limit Registers

Overcurrent Level (OCLVL) (0x044)

This register specifies the fraction of full-scale current that is declared to be an overcurrent condition. When X.IRMS

exceeds this level for one DSP cycle, the OCF flag in the X.FLAGS register is set. If the OCM flag is set in the

X.MASK register, setting the OCF flag will cause the interrupt bit OC to be set in the IRQ_FLAG register. If the inter-

rupt is enabled, the interrupt pin is driven active. Full scale is represented by 0x10000. The maximum value for this

Bit:

Name:

Phase-Angle Offset High Byte

Reset:

0x00

Bit:

Name:

Phase-Angle Offset Low Byte

Reset:

0x00

Bit:

Name:

Phase-Angle Offset High Byte

Reset:

0x00

Bit:

Name:

Phase-Angle Offset Low Byte

Reset:

0x00

Bit:

Name:

Overcurrent Level High Byte

Reset:

0xFF

Bit:

Name:

Overcurrent Level Low Byte

Reset:

0xFF

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