MAXQ3183-RAN+ datasheet(70/102 Pages) MAXIM

70 / 102 page

Low-Power, Multifunction, Polyphase AFE

with Harmonics and Tamper Detect

______________________________________________________________________________________

To enable harmonic measurement, first select a voltage

or current channel to monitor. This is done in the

AUX_CFG register. The AUX_MUX field is the 4-bit

value that selects one of the three voltage channels or

one of the four current channels to monitor.

The order of the harmonic is set in ORDH field of the

AUX_CFG register.

Also in the AUX_CFG register are two bits that enable

the auxiliary channel and enable harmonic measure-

ment on the auxiliary channel. To enable the auxiliary

channel, set the ENAUX bit. Once set, the MAXQ3183

will perform an RMS calculation on the selected chan-

nel. This is useful only for the IN (neutral current) chan-

nel, since every other voltage and current already have

RMS calculations applied by default. (The DADCNV bit

should be cleared in the SCAN_IN register in order to

enable sampling the IN channel.)

To enable harmonic measurement, set the ENHARM

bit. Now, the selected voltage or current signal is

passed to a filter that is identical to the second-order

fundamental filter, but that has separate parameters

(A1HARM, B0HARM).

Current Total Harmonic Distortion Plus

Noise (THDN)

The MAXQ3183 can output the THDN ratio for selected

current channel on-demand. It is calculated as:

This represents the ratio of the power of harmonics plus

noise over the power of the fundamental signal. To acti-

vate THDN computation, the host must first configure

the AUX channel to produce first harmonic (fundamen-

tal) on the desired current channel:

• Set AUX_CFG = 0x01C3 for current phase A

• Set AUX_CFG = 0x01C5 for current phase B

• Set AUX_CFG = 0x01C7 for current phase C

Then the THDN ratio can be read from one of the fol-

lowing virtual registers:

• Register 0x859 returns THDN.A for current phase A

• Register 0x85A returns THDN.B for current phase B

• Register 0x85C returns THDN.C for current phase C

Each register returns a raw binary value representing

the THDN ratio with LSB = 2–32. Since computation

involves signal filtering, the value THDN could require a

few seconds to settle before producing stable output.

Current Vector Sum

The MAXQ3183 supports two forms of current vector

sum calculations depending on whether neutral current

IN is available:

IVS3(t) = IA(t) + IB(t) + IC(t)

IVS4(t) = IA(t) + IB(t) + IC(t) + IN(t)

The sum must be calculated on instantaneous sample

basis. In a balanced 3-phase system, the vector sum IVS3

should be zero; a nonzero value indicates a current

unbalance. When neutral current available, vector sum

IVS4 should be always zero, no matter balanced or unbal-

anced loads; a nonzero value indicates tamper (energy

theft) or wrong meter connection. In the MAXQ3183, the

samples for IA, IB, IC, and IN are not simultaneous, there-

fore the device automatically applies an allpass filter to IB,

IC, and IN before calculating vector sum.

The MAXQ3183 calculates the RMS value of IVS3 or

IVS4 on-demand using the AUX channel. To activate

vector sum computations, the host must set following

configuration bits:

For IVS3:

1) AUX_CFG.ENAUX = 1—to enable the AUX channel

2) AUX_CFG.AUX_MUX = 1001b (0x9)—select IA + IB

+ IC input to the AUX channel

The above settings result in AUX_CFG = 0x0049.

For IVS4:

1) SCAN_IN.DADCNV = 0—to enable ADC sampling

neutral current IN (SCAN_IN = 0x60)

2) AUX_CFG.ENAUX = 1—to enable the AUX channel

3) AUX_CFG.AUX_MUX =1111b (0xF)—select IA + IB

+ IC + IN input to the AUX channel

The above settings result in AUX_CFG = 0x004F.

Once the above configuration is set, the MAXQ3183

starts accumulating the specified vector sum. The result

can then be read from the N.RMS register as raw value

or from I.N virtual register as converted value. If the

averaging filter is enabled (AVG_C > 0), the value could

require a few seconds to settle before producing stable

output. The MAXQ3183 has an additional control bit

AUX_CFG.INREV to reverse the sign of IN current. When

the bit is set (AUX_CFG = 0x006F), the MAXQ3183 cal-

culates the value (IA + IB + IC - IN) instead of (IA + IB +

IC + IN). Doing so allows vector sum computation in

case of reverse connection of neutral current sensor.

A threshold (ISUMLVL, address 0x054) can also be

specified to cause the MAXQ3183 to generate an inter-

rupt when the vector sum exceeds the threshold.

THDN X

XIRMS

fund

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