MAXQ3183-RAN+ datasheet(101/102 Pages) MAXIM

101 / 102 page

Low-Power, Multifunction, Polyphase AFE

with Harmonics and Tamper Detect

_____________________________________________________________________________________

101

Package Information

For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the

package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to

the package regardless of RoHS status.

CMOS design guidelines for any semiconductor require

that no pin be taken above DVDD or below DGND.

Violation of this guideline can result in a hard failure

(damage to the silicon inside the device) or a soft fail-

ure (unintentional modification of memory contents).

Voltage spikes above or below the device’s absolute

maximum ratings can potentially cause a devastating

IC latchup.

Microcontrollers commonly experience negative volt-

age spikes through either their power pins or general-

purpose I/O pins. Negative voltage spikes on power

pins are especially problematic as they directly couple

to the internal power buses. Devices such as keypads

can conduct electrostatic discharges directly into the

microcontroller and seriously damage the device.

System designers must protect components against

these transients that can corrupt system memory.

Specific Design Considerations for

MAXQ3183-Based Systems

To reduce the possibility of coupling noise into the

microcontroller, the system should be designed with a

crystal or oscillator in a metal case that is grounded to

the digital plane. Doing so reduces the susceptibility of

the design to fast transient noise.

Because the MAXQ3183 is designed for use in systems

where high voltages are present, care must be taken to

route all signal paths, both analog and digital, as far

away as possible from the high-voltage components.

It is possible to construct more elaborate metering

designs using multiple MAXQ3183 devices. This can be

accomplished by using a single SPI bus to connect all

the MAXQ3183 devices together but using separate

slave select lines to individually select each MAXQ3183.

Additional Documentation

Designers must ensure they have the latest MAXQ3183

errata documents. Errata sheets contain deviations

from published specifications. A MAXQ3183 errata

sheet for any specific device revision is available at

www.maxim-ic.com/errata.

Technical Support

For technical support, go to https://support.maxim-

ic.com/micro.

PACKAGE TYPE

PACKAGE CODE

DOCUMENT NO.

28 TSSOP

U28+3

21-0066

TOP VIEW

MAXQ3183

TSSOP

AVDD

I0N

V0P

I0P

V1P

INP

V2P

DVDD

I2P

VCOMM

I1N

RESET

I2N

CFQ

AGND

CFP

XTAL2

DGND

XTAL1

DVDD

IRQ

MISO

SSEL

VREF

I1P

MOSI

SCLK

Pin Configuration

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