PC87307 datasheet(70/218 Pages) NSC

70 / 218 page

The Digital Floppy Disk Controller (FDC) (Logical Device 3)

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5.3

THE REGISTERS OF THE FDC

The FDC registers are mapped to the offset address shown

in Table 5-1, with the base address range provided by the

on-chip address decoder. For PC-AT or PS/2 applications,

the offset address range of the diskette controller is 00h

through 07h from the index of logical device 3.

TABLE 5-1. The FDC Registers and Their Addresses

The FDC supports two system operation modes: PC-AT

drive mode and PS/2 drive mode (MicroChannel systems).

Section 5.1.2 on page 66 describes each mode and “Bit 2 -

PC-AT or PS/2 Drive Mode Select” on page 35 describes

how each is enabled.

Unless specifically indicated otherwise, all fields in all regis-

ters are valid in both drive modes.

The FDC supports plug and play, as follows:

• The FDC interrupt can be routed on one of the following

ISA interrupts: IRQ3-IRQ7, IRQ9-IRQ12 and IRQ15

(see PNP2 register).

• The FDC DMA signals can be routed to one of three 8-

bit ISA DMA channels (see PNP2 register); and its base

address is software configurable (see FBAL and FBAH

registers).

• Upon reset, the DMA of the FDC is routed to the DRQ2

and DACK2 pins.

5.3.1

Status Register A (SRA), Offset 00h

Status Register A (SRA) monitors the state of assigned IRQ

signal and some of the disk interface signals. SRA is a read-

only register that is valid only in PS/2 drive mode.

SRA can be read at any time while PS/2 drive mode is ac-

tive. In PC-AT drive mode, all bits are in TRI-STATE during

a microprocessor read.

Symbol

Description

Offset

R/W

A2 A1 A0

SRA

Status Register A

SRB

Status Register B

DOR

Digital Output Register

R/W

TDR

Tape Drive Register

R/W

MSR

Main Status Register

DSR

Data Rate Select Register 1

FIFO

Data Register (FIFO)

R/W

(Bus in TRI-STATE)

DIR

Digital Input Register

CCR

CCR Conﬁguration

Control Register

111

FIGURE 5-5. SRA Register Bitmap (PS/2 Drive Mode)

Bit 0 - Head Direction

This bit indicates the direction of the head of the Floppy

Disk Drive (FDD). Its value is the inverse of the value of

the DIR interface output signal.

0 - DIR is not active, i.e., the head of the FDD steps

outward. (Default)

1 - DIR is active, i.e., the head of the FDD steps in-

ward.

Bit 1 - Write Protect (WP)

This bit indicates whether or not the selected Floppy

Disk Drive (FDD) is write protected. Its value reflects the

status of the WP disk interface input signal.

0 - WP is active, i.e., the FDD in the selected drive is

write protected.

1 - WP is not active, i.e., the FDD in the selected drive

is not write protected.

Bit 2 - Beginning of Track (INDEX)

This bit indicates the beginning of a track. Its value re-

flects the status of the INDEX disk interface input signal.

0 - INDEX is active, i.e., it is the beginning of a track.

1 - INDEX is not active, i.e., it is not the beginning of a

track.

Bit 3 - Head Select

This bit indicates which side of the Floppy Disk Drive

(FDD) is selected by the head. Its value is the inverse of

the HDSEL disk interface output signal.

0 - HDSEL is not active, i.e., the head of the FDD se-

lects side 0. (Default)

1 - HDSEL is active, i.e., the head of the FDD selects

side 1.

Bit 4 - At Track 0 (TRK0)

This bit indicates whether or not the head of the Floppy

Disk Drive (FDD) is at track 0. Its value reflects the sta-

tus of the TRK0 disk interface input signal.

0 - TRK0 is active, i.e., the head of the FDD is at track

1 - TRK0 is not active, i.e., the head of the FDD is not

at track 0.

76543210

Reset

Required

Status Register

A (SRA)

Offset 00h

INDEX

TRK0

Step

Reserved

IRQ Pending

Head Direction

Head Select

PS/2 Drive Mode

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