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PC87307 Folha de dados(PDF) 65 Page - National Semiconductor (TI) |
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PC87307 Folha de dados(HTML) 65 Page - National Semiconductor (TI) |
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65 / 218 page ![]() 65 Real-Time Clock (RTC) and Advanced Power Control (APC) (Logical Device 2) www.national.com TABLE 4-8. Bank 1 Registers, RTC Memory Bank TABLE 4-9. Bank 2 Registers, APC Memory Bank TABLE 4-10. Available General Purpose Bytes Register Index Type Power-on Value Function 00h-3Fh Banks 0, 1 and 2 share the first 14 RTC registers and the first 50 RTC RAM bytes. 40h-47h Reserved. Writes have no effect and reads return 00h Century 48h R/W 00h BCD Format: 00-99. Binary Format: 00-63 49h-4Fh Reserved Upper RAM Address Port 50h R/W Bits 6-0: Address of the upper 128 RAM bytes. Bit 7: Reserved. 51h-52h Reserved Upper RAM Data Port 53h R/W The byte pointed by the Upper RAM Address Port is accessed via this register. 54h-7Fh Reserved Register Index Type Power-On Value Function 00h - 3Fh Banks 0, 1 and 2 share the first 14 RTC registers and the first 50 bytes of RTC RAM. APC Control Register 1 (APCR1) 40h R/W 00h See “APC Control Register 1 (APCR1), Index 40h” on page 60 APC Control Register 2 (APCR2) 41h R/W 00h See “APC Control Register 2 (APCR2), Index 41h” on page 61 APC Status Register (APSR) 42h R 1000001 (binary) (bit 7 is indeterminate) See “APC Status Register (APSR), Index 42h” on page 61 Wake Up Day of Week 43h R/W BCD Format: 01-07 Binary Format: 01-07 (Sunday = 1) Wake Up Date of Month 44h R/W BCD Format: 01-31 Binary Format: 01-1F Wake Up Month 45h R/W BCD Format: 01-12 Binary Format: 01-0C Wake Up Year 46h R/W BCD Format: 00-99 Binary Format: 00-63 RAM Lock 47h R/W 00h; initialized also on MR pin reset. See “RAM Lock Register (RLR), Index 47h” on page 62 Wake Up Century 48h R/W BCD Format: 00-99 Binary Format: 00-63 49h-7Fh Reserved Index Bank Number of Bytes Notes 0Eh - 3Fh All 50 40h - 7Fh Bank 0 64 50h, 53h Bank 1 128 Indirect access via 50h for address and 53h for data. Total 242 |
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