PC87307 datasheet(35/218 Pages) NSC

35 / 218 page

Configuration

www.national.com

Bit 0 - ZWS Enable

This bit controls assertion of ZWS on any host SuperI/O

chip access, except for configuration registers access

(including Serial Isolation register) and except for Paral-

lel Port access.

For ZWS assertion on host-EPP access, see Section

6.5.17 on page 126.

0 - ZWS is not asserted.

1 - ZWS is asserted.

Bit 1 - CSOUT-NSC-test or CS0 Pin Select

This bit is initialized with SELCS strap value.

0 - CSOUT-NSC-test on CS0 pin.

1 - CS0.

Bit 2 - PC-AT or PS/2 Drive Mode Select

0 - PS/2 drive mode.

1 - PC-AT drive mode. (Default)

Bit 3 - Reserved

Reserved.

Bit 4 - X-Bus Data Buffer (XDB) Select

Select X-bus buffer on the XDB pins. This read only bit

is initialized with the CFG1 strap value. See also Chap-

ter 10 on page 179.

0 - No XDB buffer. XDB pins have alternate function,

see Table 1-2 on page 23.

1 - XDB enabled.

Bit 5 - Lock Scratch Bit

This bit controls bits 7 and 6 of this register. Once this

bit is set to 1 by software, it can be cleared to 0 only by

a hardware reset.

0 - Bits 7 and 6 of this register are read/write bits.

1 - Bits 7 and 6 of this register are read only bits.

Bits 7,6 - General Purpose Scratch Bits

When bit 5 is set to 1, these bits are read only. After re-

set they can be read or written. Once changed to read-

only, they can be changed back to be read/write bits

only by a hardware reset.

2.4.4

SuperI/O Configuration 2 Register, Index 22h

This read/write register is reset by hardware to 00h-03h.

See BADDR1,0 strap pins in Section 2.1.3.

FIGURE 2-4. SuperI/O Conﬁguration 2 Register Bitmap

BADDR1 and BADDR0

GPIO Bank Select

76543210

Reset

Required

SuperI/O Configuration 2

Index 22h

GPIO21, IRSL2/ ID2 or ISL0 Pin Select

GPIO22 or POR Select

GPIO20 or IRSL1 Pin Select

GPIO17 or WDO Pin Select

Bits 1,0 - BADDR1 and BADDR0

Initialized on reset by BADDR1 and BADDR0 strap pins

(BADDR0 on bit 0). These bits select the addresses of

the configuration Index and Data registers and the Plug

and Play ISA Serial Identifier. See Tables 2-1 and 2-2.

Bit 2 - GPIO22 or POR Pin Select

The output buffer of this pin is selected by Port 2 Output

Type and Port 2 Pull-up Control registers.

0 - The pin is GPIO22.

1 - The pin is POR.

Bits 4,3 - GPIO21, IRSL2/ID2 or IRSL0 Pin Select

The output buffer of this pin is selected by Port 2 Output

Type and Port 2 Pull-up Control registers as shown in

Table 2-21.

TABLE 2-21. Signal Assignment for Pins 158 and 77

Bit 5 - GPIO20, IRSL1 or ID1 Pin Select

The output buffer of this pin is selected by Port 2 Output

Type and Port 2 Pull-up Control registers.

0 - The pin is GPIO20.

1 - The pin is IRSL1/ID1.

Bit 6 - GPIO17 or WDO Pin Select

This bit determines whether GPIO17 or WDO is routed

to pin 156 when bit 7 of the Port 1 Direction register at

offset 01h of logical device 7 is set to 1. See Section 8.1

on page 170.

The output buffer of this pin is selected by Port 2 Output

Type and Port 2 Pull-up Control registers.

0 - GPIO17 uses the pin. (Default)

1 - WDO uses the pin.

Bit 7 - GPIO Bank Select

This bit selects the active register ban1k of GPIO regis-

ters.

0 - Bank 0 is selected. (Default)

1 - Bank 1 is selected.

2.4.5

Programmable Chip Select Configuration Index

This read/write register is reset by hardware to 00h. It indi-

cates the index of one of the Programmable Chip Select

(CS0, CS1 or CS2) configuration registers described in

Section 2.10.

The data in the indicated register is in the Programmable

Chip Select Configuration Data register at index 24h.

Bits 7 through 4 are read only and return 0000 when read.

Bit

4 3

Pin 158

Pin 77 when Bit 4 of SuperI/O

Conﬁg 1 Register = 0

0 0

GPIO21

IRSL2/SELCS

0 1

IRSL2/ID2

GPIO21/SELCS

1 0

IRSL0

IRSL2/SELCS

1 1

Reserved

IRSL2/SELCS

PC87307 Folha de dados(PDF) 35 Page - National Semiconductor (TI)

PC87307 Folha de dados(HTML) 35 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Folha de dados Download

Ligação URL