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ADP1052ACPZ-R7 Folha de dados(PDF) 72 Page - Analog Devices

Nome de Peças ADP1052ACPZ-R7
Descrição Electrónicos  Digital Controller for Isolated Power Supply with PMBus Interface
PDF  113 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
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ADP1052ACPZ-R7 Folha de dados(HTML) 72 Page - Analog Devices

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ADP1052
Data Sheet
Rev. B | Page 72 of 113
Table 53. Register 0x61—TON_RISE
Bits
Bit Name/Function
R/W
Description
[15:11]
Exponent
R/W
5-bit, twos complement N value for linear format, X = Y × 2N.
[10:0]
Mantissa
R/W
11-bit, twos complement Y value for linear format, X = Y × 2N.
TOFF_DELAY
The TOFF_DELAY command sets the turn-off delay time in milliseconds (ms). The ADP1052 supports only those values listed in Table 54.
Table 54. Register 0x64—TOFF_DELAY (Turn-Off Delay Options Supported in the ADP1052)
Register Setting
Turn-Off Delay Time (ms)
0000000000000000 (0x0000)
0
0000000000110010 (0x0032)
50
0000000011111010 (0x00FA)
250
0000001111101000 (0x03E8)
1000
Table 55. Register 0x64—TOFF_DELAY
Bits
Bit Name/Function
R/W
Description
[15:11]
Exponent
R/W
5-bit, twos complement, N value for linear format X = Y × 2N.
[10:0]
Mantissa
R/W
11-bit, twos complement, Y value for linear format X = Y × 2N.
STATUS_BYTE
Table 56. Register 0x78—STATUS_BYTE
Bits
Bit Name/Function
R/W
Description
7
Reserved
R
Reserved.
6
POWER_OFF
R
This bit is asserted when the unit is not providing power to the output, regardless of the reason,
including simply not being enabled.
5
VOUT_OV_FAULT
R
An output overvoltage fault has occurred.
4
IOUT_OC_FAULT
R
An output overcurrent fault has occurred.
3
VIN_UV_FAULT
R
An input undervoltage fault has occurred.
2
Temperature
R
A temperature fault or warning has occurred.
1
CML
R
A communications, memory, or logic fault has occurred.
0
None of the above
R
A fault or warning not listed in Bits[7:1] has occurred.
STATUS_WORD
Table 57. Register 0x79—STATUS_WORD
Bits
Bit Name/Function
R/W
Description
15
VOUT
R
Any bit asserted in STATUS_VOUT asserts this bit.
14
IOUT
R
Any bit asserted in STATUS_IOUT asserts this bit.
13
Input
R
Any bit asserted in STATUS_INPUT asserts this bit.
12
Reserved
R
Reserved.
11
POWER_GOOD
R
POWER_GOOD is a negation of POWER_GOOD, which means that the output power is not good.
This bit is set when the sensed VOUT is less than the limit programmed in the POWER_GOOD_OFF
command. This bit clears when the sensed VOUT voltage is greater than the limit that is programmed in
the POWER_GOOD_ON command. This flag also triggers the PGOOD flag in Register 0xFEA0[6].
[10:7]
Reserved
R
Reserved.
6
POWER_OFF
R
This bit is asserted if the unit is not providing power to the output, regardless of the reason,
including not being enabled.
5
VOUT_OV_FAULT
R
An output overvoltage fault has occurred.
4
IOUT_OC_FAULT
R
An output overcurrent fault has occurred.
3
VIN_UV_FAULT
R
An input undervoltage fault has occurred.
2
Temperature
R
An overtemperature fault or warning has occurred.
1
CML
R
A communications, memory, or logic fault has occurred.
0
None of the above
R
A fault or warning not listed in Bits[7:1] has occurred.



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