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ADP1052

Data Sheet

Rev. B | Page 40 of 113

The following flags can be configured to trigger protection

responses:

•

IIN_OC_FAST_FAULT

•

VOUT_OV_FAULT

•

CS3_OC_FAULT

•

VIN_UV_FAULT

•

FLAGIN

•

SR_RC_FAULT

The VOUT_OV_FAULT flag, which triggers the manufacturer

specific protection in Register 0xFE01[7:4], is used for conditional

overvoltage protection only. See the VOUT Overvoltage

Protection (OVP) section for details.

Each of the aforementioned flags can be programmed individually

to trigger one of the following responses:

•

Continue operation without interruption (flag ignored)

•

Disable SR1 and SR2

•

Disable all PWM outputs

After the condition that triggered the flag is resolved and the flag is

cleared, the ADP1052 can be programmed to respond as follows:

•

After the flag reenable delay time elapses, reenable the

disabled PWM outputs with a soft start sequence.

•

Reenable the disabled PWM outputs immediately without

the soft start process.

•

Keep the PWM output disabled. A PSON reset signal must

be used to reenable the PWM outputs with a soft start

sequence.

For the SR_RC_FAULT flag, there is a fourth response option: the

rising edges of SR1 and SR2 move to

tRx + tMODU_LIMIT − tOFFSET

where tRx represents tR1, tR2, and so forth.

After the flag is cleared, the ADP1052 can be programmed to

respond as follows:

•

SR1 and SR2 return to normal with soft start

•

SR1 and SR2 return to normal without soft start

For more information, see the Synchronous Rectification (SR)

Reverse Current Protection section.

The first flag that causes all PWM outputs to be disabled, and

also requires a soft start if the PWM outputs are reenabled, is

recorded as the first flag ID. For more information about use

of the first flag ID, see the First Flag ID Recording section.

A flag reenable delay can be set for the listed manufacturer

specific flags. This delay is used if the configured action for

a flag is to reenable the PWM outputs after the flag reenable delay.

This delay can be set to 250 ms, 500 ms, 1 sec, or 2 sec, using

PEAK DATA TELEMETRY

To detect excursions from nominal conditions, the ADP1052

supports a unique feature of recording the peak telemetry data

for the parameters listed in Table 9 (note that the values are

recorded and latched in their respective registers).

After the system has reached regulation, the values listed in

Table 9 are latched in the corresponding registers. The user can

poll the device for the peak (minimum/maximum) values by

performing a read operation from the corresponding registers.

In addition, the user can reset the peak registers by writing the

appropriate reset value (see Table 9).

To ensure that the correct peak value is recorded, a programmable

update rate is provided in Register 0xFE65[5:3] that varies at

speeds as slow as 2.6 ms and as fast as 82 µs. The slower the update

rate, the better the averaged value; however, if the update rate is

significantly larger than the duration of the peak excursion, the

peak value is averaged over the time period defined by the

update rate.

If the user intends to change the update rate on-the-fly, it is

recommended to clear the registers as defined in Table 9

immediately after writing to the update rate command.

Table 9. Recording Peak Telemetry Data Latch Values

Parameter

Value Written to

Reset Data

Minimum Output Voltage

MFR_VOUT_MIN

0xA4

0xFFFF

Maximum Output Voltage

MFR_VOUT_MAX

0xA5

0x0000

Maximum Output Current

MFR_IOUT_MAX

0xA6

0x0000

Maximum Output Power

MFR_POUT_MAX

0xA7

0x0000

Maximum Temperature

MFR_TEMPERATURE_MAX

0xC0

0x0000

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