ADIN2111CCPZ-R7 datasheet(102/125 Pages) AD

102 / 125 page

Data Sheet

ADIN2111

REGISTERS

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Rev. 0 | 102 of 125

Table 191. Bit Descriptions for AN_ADV_ABILITY_H

Bits

Bit Name

Description

Reset

Access

age (2.4 V p-p) transmit operating mode. See IEEE P802.cg Subclause

146.6.4 for more details.

[11:0]

RESERVED

Reserved.

0x0

BASE-T1 Autonegotiation Link Partner Base Page Ability Register, Bits[15:0]

Device Address: 0x07; Register Address: 0x0205, Reset: 0x0000, Name: AN_LP_ADV_ABILITY_L

This address corresponds to the BASE-T1 autonegotiation base page ability register, Bits[15:0], of the link partner specified in Clause

45.2.7.22 of Standard 802.3. Note that the value of the AN_LP_ADV_ABILITY_M and AN_LP_ADV_ABILITY_H registers is latched when

AN_LP_ADV_ABILITY_L is read.

Table 192. Bit Descriptions for AN_LP_ADV_ABILITY_L

Bits

Bit Name

Description

Reset

Access

AN_LP_ADV_NEXT_PAGE_REQ

Link Partner Next Page Request. This bit indicates that the link partner PHY wants

to send a next page. See IEEE Standard 802.3 Subclause 98.2.1.2.9.

0x0

AN_LP_ADV_ACK

Link Partner Acknowledge (ACK). This bit indicates that the device has received the

link codeword of its link partner. See IEEE Standard 802.3 Subclause 98.2.1.2.8.

0x0

AN_LP_ADV_REMOTE_FAULT

Link Partner Remote Fault. See IEEE Standard 802.3 Subclause 98.2.1.2.7.

0x0

AN_LP_ADV_FORCE_MS

Link Partner Force Master/Slave Configuration. This bit reports the forced mas-

ter/slave configuration of the link partner, with values as follows. See IEEE Standard

802.3 Subclause 98.2.1.2.5 for more details.

0x0

0: preferred mode (AN_LP_ADV_MST is a preferred configuration).

1: forced mode (AN_LP_ADV_MST is a forced configuration).

[11:10]

AN_LP_ADV_PAUSE

Link Partner Pause Ability. This bit field reports the support of the link partner for

asymmetric and symmetric pause functions on full duplex links. See IEEE Standard

802.3 Subclause 98.2.1.2.6 for more details.

0x0

[9:5]

RESERVED

Reserved.

0x0

[4:0]

AN_LP_ADV_SELECTOR

Link Partner Selector. The value of this field reads 00001, which is the IEEE 802.3

selector value. See IEEE Standard 802.3 Subclause 98.2.1.2.1.

0x0

BASE-T1 Autonegotiation Link Partner Base Page Ability Register, Bits[31:16]

Device Address: 0x07; Register Address: 0x0206, Reset: 0x0000, Name: AN_LP_ADV_ABILITY_M

This address corresponds to the BASE-T1 autonegotiation base page ability register, Bits[31:16], of the link partner specified in Clause

45.2.7.22 of Standard 802.3. Note that the value of this register is latched when AN_LP_ADV_ABILITY_L is read. Reading this register returns

the latched value rather than the current value.

Table 193. Bit Descriptions for AN_LP_ADV_ABILITY_M

Bits

Bit Name

Description

Reset

Access

RESERVED

Reserved.

0x0

AN_LP_ADV_B10L

Link Partner 10BASE-T1L Ability. This bit indicates if the link partner has 10BASE-T1L ability.

0x0

[13:8]

RESERVED

Reserved.

0x0

AN_LP_ADV_B1000

Link Partner 1000BASE-T1 Ability. This bit indicates if the link partner has 1000BASE-T1 ability.

0x0

AN_LP_ADV_B10S_FD

Link Partner 10BASE-T1S Full Duplex Ability. This bit indicates if the link partner has 10BASE-

T1S ability.

0x0

AN_LP_ADV_B100

Link Partner 100BASE-T1 Ability. This bit indicates if the link partner has 100BASE-T1 ability.

0x0

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