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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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ADIN2111CCPZ-R7 Folha de dados(PDF) 52 Page - Analog Devices |
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ADIN2111CCPZ-R7 Folha de dados(HTML) 52 Page - Analog Devices |
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52 / 125 page  Data Sheet ADIN2111 REGISTERS analog.com Rev. 0 | 52 of 125 Table 42. MAC Register Summary Address Name Description Reset Access 0xD3 P2_RX_UCAST_CNT P2 Rx Unicast Frame Count Register. 0x00000000 R 0xD4 P2_RX_CRC_ERR_CNT P2 Rx CRC Errored Frame Count Register. 0x00000000 R 0xD5 P2_RX_ALGN_ERR_CNT P2 Rx Align Error Count Register. 0x00000000 R 0xD6 P2_RX_LS_ERR_CNT P2 Rx Long/Short Frame Error Count Register. 0x00000000 R 0xD7 P2_RX_PHY_ERR_CNT P2 Rx PHY Error Count Register. 0x00000000 R 0xD8 P2_TX_FRM_CNT P2 Tx Frame Count Register. 0x00000000 R 0xD9 P2_TX_BCAST_CNT P2 Tx Broadcast Frame Count Register. 0x00000000 R 0xDA P2_TX_MCAST_CNT P2 Tx Multicast Frame Count Register. 0x00000000 R 0xDB P2_TX_UCAST_CNT P2 Tx Unicast Frame Count Register. 0x00000000 R 0xDC P2_RX_DROP_FULL_CNT P2 Rx Frames Dropped Due to FIFO Full Register. 0x00000000 R 0xDD P2_RX_DROP_FILT_CNT P2 Rx Frames Dropped Due to Filtering Register. 0x00000000 R 0xDE P2_RX_IFG_ERR_CNT Frames Received on Port 2 with IFG Errors. 0x00000000 R 0xE0 P2_TX_IFG P2 Transmit Interframe Gap Register. 0x0000000B R/W 0xE3 P2_LOOP P2 MAC Loopback Enable Register. 0x00000000 R/W 0xE4 P2_RX_CRC_EN P2 CRC Check Enable on Receive Register. 0x00000001 R/W 0xE5 P2_RX_IFG P2 Receive Interframe Gap Register. 0x0000000A R/W 0xE6 P2_RX_MAX_LEN P2 Maximum Receive Frame Length Register. 0x00000618 R/W 0xE7 P2_RX_MIN_LEN P2 Minimum Receive Frame Length Register. 0x00000040 R/W 0xE8 P2_LO_RFC P2 Rx Low Priority FIFO Frame Count Register. 0x00000000 R 0xE9 P2_HI_RFC P2 Rx High Priority FIFO Frame Count Register. 0x00000000 R 0xEA P2_LO_RXSIZE P2 Low Priority Rx FIFO Valid Half Words Register. 0x00000000 R 0xEB P2_HI_RXSIZE P2 High Priority Rx FIFO Valid Half Words Register. 0x00000000 R 0xEC P2TOP1_TXSIZE P2 to P1 Tx Size. 0x00000000 R 0xF0 P2_TTSCAH Transmit Time Stamp Capture Register A (High). 0x00000000 R 0xF1 P2_TTSCAL Transmit Time Stamp Capture Register A (Low). 0x00000000 R 0xF2 P2_TTSCBH Transmit Time Stamp Capture Register B (High). 0x00000000 R 0xF3 P2_TTSCBL Transmit Time Stamp Capture Register B (Low). 0x00000000 R 0xF4 P2_TTSCCH Transmit Time Stamp Capture Register C (High). 0x00000000 R 0xF5 P2_TTSCCL Transmit Time Stamp Capture Register C (Low). 0x00000000 R Identification Version Register Address: 0x00, Reset: 0x00000010, Name: IDVER Table 43. Bit Descriptions for IDVER Bits Bit Name Description Reset Access [31:8] RESERVED Reserved. 0x0 R [7:4] MAJVER OA Major Version. Major version identifier of the OPEN Alliance serial 10BASE-T1x MACPHY interface specifica- tion supported by this device. 0x1 R [3:0] MINVER OA Minor Version. Minor version identifier of the OPEN Alliance serial 10BASE-T1x MACPHY interface specifica- tion supported by this device. 0x0 R PHY Identification Register Address: 0x01, Reset: 0x0283BCA1, Name: PHYID |
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