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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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ADIN2111CCPZ-R7 Folha de dados(PDF) 84 Page - Analog Devices |
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ADIN2111CCPZ-R7 Folha de dados(HTML) 84 Page - Analog Devices |
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84 / 125 page  Data Sheet ADIN2111 REGISTERS analog.com Rev. 0 | 84 of 125 Table 150. Bit Descriptions for P2_TTSCAL Bits Bit Name Description Reset Access [31:0] P2_TTSCL_A Port 2 Transmit Time Stamp A, Bits[31:0]. 0x0 R Transmit Time Stamp Capture Register B (High) Address: 0xF2, Reset: 0x00000000, Name: P2_TTSCBH This field contains the upper 32 bits of the captured time stamp for when the requested frame was transmitted. Table 151. Bit Descriptions for P2_TTSCBH Bits Bit Name Description Reset Access [31:0] P2_TTSCH_B Port 2 Transmit Time Stamp B, Bits[63:32]. 0x0 R Transmit Time Stamp Capture Register B (Low) Address: 0xF3, Reset: 0x00000000, Name: P2_TTSCBL This field contains the lower 32 bits of the captured time stamp for when the requested frame was transmitted. Table 152. Bit Descriptions for P2_TTSCBL Bits Bit Name Description Reset Access [31:0] P2_TTSCL_B Port 2 Transmit Time Stamp B, Bits[31:0]. 0x0 R Transmit Time Stamp Capture Register C (High) Address: 0xF4, Reset: 0x00000000, Name: P2_TTSCCH This field contains the upper 32 bits of the captured time stamp for when the requested frame was transmitted. Table 153. Bit Descriptions for P2_TTSCCH Bits Bit Name Description Reset Access [31:0] P2_TTSCH_C Port 2 Transmit Time Stamp C, Bits[63:32]. 0x0 R Transmit Time Stamp Capture Register C (Low) Address: 0xF5, Reset: 0x00000000, Name: P2_TTSCCL This field contains the lower 32 bits of the captured time stamp for when the requested frame was transmitted. Table 154. Bit Descriptions for P2_TTSCCL Bits Bit Name Description Reset Access [31:0] P2_TTSCL_C Port 2 Transmit Time Stamp C, Bits[31:0]. 0x0 R PHY CLAUSE 22 REGISTER DETAILS Register Summary: 10BASE-T1L Single Pair Ethernet PHY Core (ADIN2111) Table 155. ADIN2111 Register Summary Address Name Description Reset Access 0x0 MI_CONTROL MII Control Register. 0x1100 R/W 0x1 MI_STATUS MII Status Register. 0x1009 R 0x2 MI_PHY_ID1 PHY Identifier 1 Register. 0x0283 R 0x3 MI_PHY_ID2 PHY Identifier 2 Register. 0xBC01 R 0xD MMD_ACCESS_CNTRL MMD Access Control. 0x0000 R/W 0xE MMD_ACCESS MMD Access. 0x0000 R/W MII Control Register Address: 0x0, Reset: 0x1100, Name: MI_CONTROL This address corresponds to the MII control register specified in Clause 22.2.4.1 of Standard 802.3. |
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