ADIN2111CCPZ-R7 datasheet(56/125 Pages) AD

56 / 125 page

Data Sheet

ADIN2111

REGISTERS

analog.com

Rev. 0 | 56 of 125

Table 48. Bit Descriptions for CONFIG2

Bits

Bit Name

Description

Reset

Access

RX_RD_ORDER

Rx Ports Read Order for the OPEN Alliance Data Protocol. On LES, there are two receive

FIFOs on each port. When using the OPEN Alliance SPI protocol and there are frames in

the FIFOs of both ports, the Rx FIFO from which a frame is read/returned to the host can be

controlled via this field.

0x0

R/W

0: Fill level. When using the SPI Data protocol, frames from the FIFO of the port containing

the most data for a particular priority level are returned first. By default, frames from the high

priority FIFO containing the most data are returned first. If the high priority FIFOs are empty,

the frames from the low priority FIFO containing the most data are returned first. .

1: Ping pong. When using the SPI data protocol, a single frame is read from each port in turn,

that is, ping pong between the two ports on a per frame basic. Again by default frames from the

high priority FIFOs are returned first. For example, if Port 1 contains high priority frames and

Port 2 contains only low priority frames, all the high priority frames from Port 1 are read first.

P2_FWD_UNK2P1

Forward Frames from Port 2 Not Matching a MAC Address to Port 1. Determines the default

rule for forwarding unknown frames. If a frame has a destination address that does not match a

MAC address, the frame is dropped if this field is 0 and P2_UNK_TO_HOST is 0.

0x0

R/W

P1_FWD_UNK2P2

Forward Frames from Port 1 Not Matching a MAC Address to Port 2. Determines the default

rule for forwarding unknown frames. If a frame has a destination address that does not match a

MAC address, the frame is dropped if this field is 0 and P1_UNK_TO_HOST is 0.

0x0

R/W

P2_FWD_UNK2HOST

Forward Frames Not Matching Any MAC Address to the Host. Determines the default rule for

forwarding unknown frames. Frames with an unknown destination address are placed in the

low priority FIFO.

0x0

R/W

PORT_CUT_THRU_EN

Enable Cut Through from Port to Port. Cut through must be enabled on device configu-

ration before receiving of frames is enabled. That is, enable cut through before setting

Px_FWD_UNK2HOST or Px_FWD_UNK2Px or writing to the ADDR_FILT_x registers.

0x1

R/W

[10:9]

RESERVED

Reserved.

0x0

R/W

TX_RDY_ON_EMPTY

Assert TX_RDY When the Tx FIFO is Empty. By default, TX_RDY asserts when a frame

transmits. If this bit is set, TX_RDY asserts when the Tx FIFO is empty. This field is only used

with the generic SPI protocol.

0x0

R/W

SFD_DETECT_SRC

Determines If the SFD is Detected in the PHY or MAC.

0x0

R/W

0: select the SFD from the PHY. This option provides the least jitter as the SFD is detected in

the same 120 MHz clock domain as is used in 1588 timer logic.

1: select the SFD from the MAC. The SFD from the MAC is from the 25 MHz clock domain and

results in additional jitter on the SFD detection.

STATS_CLR_ON_RD

Statistics Clear on Reading. This field determines if the fol-

lowing registers/counters are cleared on reading: Px_RX_FRM_CNT,

Px_RX_BCAST_CNT, Px_RX_MCAST_CNT, Px_RX_UCAST_CNT, Px_RX_CRC_ERR_CNT,

Px_RX_ALGN_ERR_CNT, Px_RX_LS_ERR_CNT, Px_RX_PHY_ERR_CNT,

Px_TX_FRM_CNT, Px_TX_BCAST_CNT, Px_TX_MCAST_CNT, Px_TX_UCAST_CNT,

Px_RX_DROP_FULL_CNT, Px_RX_DROP_FILT_CNT, Px_RX_IFG_ERR_CNT,

CECC_ERRn.

0x0

R/W

0: statistic counter is not cleared on reading. When the maximum value is reached, the

counters roll over to 0x0.

1: clear statistics counters on reading. If a counter reaches its maximum value, the counter

holds at its maximum until read. When using the generic SPI protocol, the status counters must

be burst read in one SPI transaction to ensure all counters are cleared correctly in sequence.

If a single SPI register/counter is read, it clears and the next counter (address location) also

clears when using the generic SPI protocol.

CRC_APPEND

Enable CRC Append in the MAC Tx Path. Enables (1) or disables (0) CRC appendage by

the MAC. If this field is set to 0, the MAC assumes that the host is providing a frame with a

0x0

R/W

ADIN2111CCPZ-R7 Folha de dados(PDF) 56 Page - Analog Devices

ADIN2111CCPZ-R7 Folha de dados(HTML) 56 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Folha de dados Download

Ligação URL