Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

Preview PDF HTML

ADIN2111CCPZ-R7 Folha de dados(PDF) 76 Page - Analog Devices

Nome de Peças ADIN2111CCPZ-R7
Descrição Electrónicos  Low Complexity, 2-Port Ethernet Switch with Integrated 10BASE-T1L PHYs
PDF  125 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

ADIN2111CCPZ-R7 Folha de dados(HTML) 76 Page - Analog Devices

Back Button ADIN2111CCPZ-R7 Datasheet HTML 72Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 73Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 74Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 75Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 76Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 77Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 78Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 79Page - Analog Devices ADIN2111CCPZ-R7 Datasheet HTML 80Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 76 / 125 page
background image
Data Sheet
ADIN2111
REGISTERS
analog.com
Rev. 0 | 76 of 125
Table 110. Bit Descriptions for P1_TX_IFG
Bits
Bit Name
Description
Reset
Access
[31:8]
RESERVED
Reserved.
0x0
R
[7:0]
P1_TX_IFG
Interframe Gap. Generates an IFG of ((P1_TX_IFG + 1) × 8 bit times between frames on Tx.
0xB
R/W
P1 MAC Loopback Enable Register
Address: 0xB3, Reset: 0x00000000, Name: P1_LOOP
Table 111. Bit Descriptions for P1_LOOP
Bits
Bit Name
Description
Reset
Access
[31:1]
RESERVED
Reserved.
0x0
R
0
P1_LOOPBACK_EN
MAC Loopback. Enable loopback on the MII to the PHY.
0x0
R/W
0: normal operation. Loopback disabled.
1: loopback enabled.
P1 CRC Check Enable on Receive Register
Address: 0xB4, Reset: 0x00000001, Name: P1_RX_CRC_EN
Table 112. Bit Descriptions for P1_RX_CRC_EN
Bits
Bit Name
Description
Reset
Access
[31:1]
RESERVED
Reserved.
0x0
R
0
P1_CRC_CHK_EN
CRC Check Enable on Receive.
0x1
R/W
P1 Receive Interframe Gap Register
Address: 0xB5, Reset: 0x0000000A, Name: P1_RX_IFG
Table 113. Bit Descriptions for P1_RX_IFG
Bits
Bit Name
Description
Reset
Access
[31:6]
RESERVED
Reserved.
0x0
R
[5:0]
P1_RX_IFG
Interframe Gap. The receive MAC checks that the IFG is greater than P1_RX_IFG × 8 bit times. If the received
IFG is too small, the MAC drops the received frame and asserts P1_RX_IFG_ERR. The maximum value
supported in this field is 63 decimal.
0xA
R/W
P1 Maximum Receive Frame Length Register
Address: 0xB6, Reset: 0x00000618, Name: P1_RX_MAX_LEN
Maximum receive frame length in bytes.
Table 114. Bit Descriptions for P1_RX_MAX_LEN
Bits
Bit Name
Description
Reset
Access
[31:16]
RESERVED
Reserved.
0x0
R
[15:0]
P1_MAX_FRM_LEN
Maximum Frame Length on Receive.
0x618
R/W
P1 Minimum Receive Frame Length Register
Address: 0xB7, Reset: 0x00000040, Name: P1_RX_MIN_LEN



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Folha de dados Download

Go To PDF Page


Ligação URL



ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   Link para a ficha técnica    |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com