ADIN2111CCPZ-R7 datasheet(45/125 Pages) AD

45 / 125 page

Data Sheet

ADIN2111

SWITCH SPI

analog.com

Rev. 0 | 45 of 125

space available as indicated by the transmit credit field (TXC) of

the previous data footer. In this condition, the ADIN2111 ignores

the transmit data chunk and sets the host transmit FIFO overflow

bit, and the frame data already in the buffer is dropped.

►

Transmit buffer under run. This error can only occur in cut

through mode. The SPI host must always send frame data to

the ADIN2111 faster than the network to avoid this error. When

this error occurs, the host transmit FIFO under run error bit is

set, and the ADIN2111 terminates the frame being transmitted

in a way that invalidates the frame. Additionally, the ADIN2111

ignores any additional frame data received from the SPI host

until it receives an end of frame indication (EV = 1).

►

Loss of framing error. This error occurs when the CS signal is

deasserted before the expected end of the data chunk or control

command. The ADIN2111 and the loss of frame error is set, any

transmit frame in progress is dropped, and any receive frame in

progress of being sent to the SPI host is terminated.

►

Receive buffer overflow. This error occurs when the SPI host

does not read frame data from the ADIN2111 fast enough. This

error can occur both in store and forward and cut through modes.

When this error occurs, the ADIN2111 terminates the frame

being received from the internal PHYs. In store and forward

mode, no portion of the frame is transferred to the SPI host. In

cut through mode, the ADIN2111 terminates the frame (EV = 1)

with frame drop set (FD = 1).

►

Control data protection error. The control data protection error

(CDPE) and the loss of frame error (LOFE) bits assert when

protection is enabled on the OPEN Alliance SPI and there is an

error on write data received from the host. The write does not

complete in this case. If possible, the software executes the write

again. If software does not know which configuration register

was written, the device may not be configured properly. In this

case, reset the ADIN2111 MAC by writing the RST_MAC_ONLY

keys to the software reset register.

FRAME FORWARDING ON RECEIVE

By default, the device drops all frames received. To receive frames,

set up the address filtering table, or change the default operation for

all receive frames.

Note that frames can be forwarded from one port to two destina-

tions: the other port and the host SPI port.

The device can be configured to forward up to 16 different MAC

addresses based on the MAC destination address (DA).

To receive frames with a particular DA, that DA has to be pro-

grammed to one of the 16 ADDR_FILT_x registers. Each register

is 32 bits wide. Therefore, for example, to program a DA of

08:00:00:5A:64:68 to ADDR_FILT_x0, write:

►

0x0800 to ADDR_FILT_UPR0

►

0x005A6468 to ADDR_FILT_LWR0

To forward frames with this DA to the host, set the TO_HOST bit

field within the ADDR_FILT_UPRn register to 1. To apply this rule,

set APPLY2PORT1 or APPLY2PORT2 to 1, accordingly.

MAC addresses can be masked using the ADDR_MSK_x registers.

For example, to receive all the MAC addresses in the range

0x8000005A64xx, write:

►

0xFFFF to ADDR_MSK_UPR0

►

0XFFFFFF00 to ADDR_MSK_LWR0

Frames that do not match any of the 16 ADDR_FILT_x regis-

ters are dropped by default. The user can select to forward

packages from unknown DAs to either the other port or the

host with the bit fields P2_FWD_UNK2P1, P1_FWD_UNK2P2,

P2_FWD_UNK2HOST, and P1_FWD_UNK2HOST in the MAC con-

figuration register (CONFIG2). Figure 30 shows the forwarding

algorithm. Frames received with a bad CRC or with RX_ERR

asserted from the PHYs, as well as runt and jabber frames, are

dropped and counted.

FORWARD

THE FRAME

TO THE

OTHER

PORT

YES

DA FOUND?

YES

APPLYTOPORTx = THIS PORT?

YES

TO HOST?

YES

TO_OTHER_PORT?

YES

TO_OTHER_PORT?

YES

PX_FWD_UNK2HOST

YES

PX_FWD_UNK2PX?

YES

PX_FWD_UNK2Px?

FORWARD

THE FRAME

TO THE

HOST

FORWARD

THE FRAME

TO THE

OTHER

PORT AND

THE HOST

DISCARD THE FRAME

AND INCREMENT

COUNTER

(RX_DROP_FILT_CNT)

X: PORT NUMBER (1 OR 2)

Figure 30. Frame Forwarding Algorithm

RECEIVE PRIORITY QUEUES

Each of the ADIN2111 PHYs has two different FIFOs on receive: a

high priority FIFO and a low priority FIFO.

By default, the low priority FIFO is configured to 12 kB, and

the high priority FIFO is configured to 8 kB. The sizes of these

FIFOs can be changed before receiving or transmitting any

frames via the P1_RX_LO_SIZE and P1_RX_HI_SIZE (Port 1)

and P2_RX_LO_SIZE and P2_RX_HI_SIZE (Port 2) fields in the

FIFO_SIZE register.

STATISTICS COUNTERS

The ADIN2111 has fifteen 16-bit counters on each port that incre-

ment on frame transmit and receive. They roll over to 0 when the

maximum value of 65535 is reached and they are not cleared on

reading. Therefore, the counters must be read every four seconds

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