ADIN1300CCPZ-R7 datasheet(55/79 Pages) AD

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Data Sheet

ADIN1300

Rev. 0 | Page 55 of 79

Bits

Bit Name

Description

Reset

Access

01001: on if collision.

01000: on if full duplex link.

00111: on if activity (transmitting or receiving).

00110: on if receiving.

00101: on if transmitting.

00100: on if link up.

00011: on if 1000BASE-T link, blink if 100BASE-TX.

00010: on if 10BASE-T link.

00001: on if 100BASE-TX link.

00000: on if 1000BASE-T link.

LED Control 3 Register

Address: 0x001D, Reset: 0x1855, Name: LED_CTRL_3

This register provides access to various PHY LED control register bits.

Table 56. Bit Descriptions for LED_CTRL_3

Bits

Bit Name

Description

Reset

Access

[15:14]

LED_PAT_SEL

The LED_PAT_SEL bit field is always 2'b00, allowing the user to program the LED_0

blink pattern via the LED_PAT, LED_PAT_TICK_DUR, and LED_PAT_PAUSE_DUR bit fields.

0x0

R/W

11: reserved.

10: reserved.

01: reserved.

00: read/write access to LED_0 blink pattern registers.

[13:8]

LED_PAT_TICK_DUR

Each bit in the blink pattern bit field (LED_PAT) is driven to the corresponding LED pin

and held for the duration specified in this 6-bit LED pattern duration bit field. The

duration is the value of this register plus 1 multiplied by 8, for example, 8 ms, 16 ms, …

504 ms. The value 63 has a special meaning of 1 ms tick duration. Also see the

LED_PAT_PAUSE_DUR bit field (LED_CTRL_1 register, Address 0x001B). The default

blink is a 0.5 sec on and 0.5 sec off pattern.

0x18

R/W

[7:0]

LED_PAT

The internal LED pattern for LED_0 can be read or written via this field. The LED_PAT_SEL

field selects which set of internal blink pattern registers for LED_0 is accessed. The default

value of the LED pattern is 0x55 and is, therefore, an alternating 0/1 pattern (LED_CTRL_1

0x55

R/W

PHY Status 2 Register

Address: 0x001F, Reset: 0x03FC, Name: PHY_STATUS_2

This register provides access to various PHY status register bits.

Table 57. Bit Descriptions for PHY_STATUS_2

Bits

Bit Name

Description

Reset

Access

RESERVED

Reserved.

0x0

PAIR_23_SWAP

A 1 indicates that Pair 2 and Pair 3 have been swapped.

0x0

PAIR_3_POL_INV

A 1 indicates that the polarity on Pair 3 has been inverted.

0x0

PAIR_2_POL_INV

A 1 indicates that the polarity on Pair 2 has been inverted.

0x0

PAIR_1_POL_INV

A 1 indicates that the polarity on Pair 1 has been inverted.

0x0

PAIR_0_POL_INV

A 1 indicates that the polarity on Pair 0 has been inverted.

0x0

[9:1]

RESERVED

Reserved.

0x1FE

B_1000_DSCR_ACQ_ERR

A 1 indicates an error has occurred during the acquisition of the scrambler during

1000BASE-T start-up. This error can occur because the pair skew is too large.

0x0

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