ADIN1300CCPZ-R7 datasheet(47/79 Pages) AD

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Data Sheet

ADIN1300

Rev. 0 | Page 47 of 79

Bits

Bit Name

Description

Reset

Access

PREF_MSTR_ADV

Prefer Master (or Port Type) Advertisement Bit. This bit is used to indicate the

preference to operate as master (multiport device) or as slave (single port device) if

the MAN_MSTR_SLV_EN_ADV bit (Bit 9), is not set. Usage of this bit is described in

Clause 40.5.2 of IEEE Standard 802.3. Note that the default value of this register

bit is configurable via the hardware configuration pins, which allows the default

operation of the PHY to be configured in unmanaged applications.

0x0

R/W

1: multiport device.

0: single port device.

FD_1000_ADV

1000BASE-T Full Duplex Advertisement Bit. Note that the default value of this

default operation of the PHY to be configured in unmanaged applications.

0x1

R/W

1: advertise PHY is 1000BASE-T full duplex capable.

0: advertise PHY is not 1000BASE-T full duplex capable.

HD_1000_ADV

1000BASE-T Half Duplex Advertisement Bit. Note that the default value of this

default operation of the PHY to be configured in unmanaged applications.

0x0

R/W

1: advertise PHY is 1000BASE-T half duplex capable.

0: advertise PHY is not 1000BASE-T half duplex capable.

[7:0]

RESERVED

Reserved.

0x0

Master Slave Status Register

Address: 0x000A, Reset: 0x0000, Name: MSTR_SLV_STATUS

This address corresponds to the master slave status register specified in Clause 40.5.1.1 of IEEE Standard 802.3.

Table 41. Bit Descriptions for MSTR_SLV_STATUS

Bits

Bit Name

Description

Reset

Access

MSTR_SLV_FLT

Master/Slave Configuration Fault Bit. When this bit goes high, it latches high until it is

unlatched by reading. This bit self clears on autonegotiation enable or autonegotiation

complete. See Clause 40.5.1.1 of IEEE Standard 802.3 for more details.

0x0

1: master slave configuration fault detected.

0: no master slave configuration fault detected.

MSTR_RSLVD

Master/Slave Configuration Resolution Bit.

0x0

1: local PHY configuration resolved to master.

0: local PHY configuration resolved to slave.

LOC_RCVR_STATUS

Local Receiver Status Bit. Defined by the value of LOC_RCVR_STATUS, as described in

Clause 40.4.5.1 of IEEE Standard 802.3.

0x0

1: local receiver okay (LOC_RCVR_STATUS = okay).

0: local receiver not okay (LOC_RCVR_STATUS = not okay).

REM_RCVR_STATUS

Remote Receiver Status Bit. Defined by the value of REM_RCVR_STATUS as, described in

Clause 40.4.5.1 of IEEE Standard 802.3.

0x0

1: remote receiver okay (REM_RCVR_STATUS = okay).

0: remote receiver not okay (REM_RCVR_STATUS = not okay).

LP_FD_1000_ABLE

Link Partner 1000BASE-T Full Duplex Ability Bit. This bit is guaranteed to be valid only

when the PAGE_RX_LAT bit (Register 0x0006, Bit 1) has been set to 1.

0x0

1: link partner is capable of 1000BASE-T full duplex.

0: link partner is not capable of 1000BASE-T full duplex.

LP_HD_1000_ABLE

Link Partner 1000BASE-T Half Duplex Ability Bit. This bit is guaranteed to be valid only

when the PAGE_RX_LAT bit (6.1) has been set to 1.

0x0

1: link partner is capable of 1000BASE-T half duplex.

0: link partner is not capable of 1000BASE-T half duplex.

[9:8]

RESERVED

Reserved.

0x0

[7:0]

IDLE_ERR_CNT

These idle error count bits contain a cumulative count of the errors detected when the

receiver is receiving idles. See Clause 40.5.1.1 of IEEE Standard 802.3 for more details.

0x0

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