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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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RA4L1 Folha de dados(PDF) 120 Page - Renesas Technology Corp |
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RA4L1 Folha de dados(HTML) 120 Page - Renesas Technology Corp |
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120 / 125 page  Table A3.1 Peripheral base address (2 of 2) Name Description Base address MSTP Module Stop Control A, B, C, D, E 0x4008_4000 POEG Port Output Enable Module for GPT 0x4008_A000 USBFS USB 2.0 FS Module 0x4009_0000 UARTA Serial Interface UARTA 0x4009_7000 SSIE0 Serial Sound Interface Enhanced (SSIE) 0x4009_D000 IIC0 Inter-Integrated Circuit 0 0x4009_F000 CANFD CANFD Module 0x400B_0000 CTSU Capacitive Touch Sensing Unit 0x400D_0000 SLCDC Segment LCD Controller/Driver 0x400D_4000 PSCU Peripheral Security Control Unit 0x400E_0000 AGT0 Low Power Asynchronous General purpose Timer 0 0x400E_8000 AGT1 Low Power Asynchronous General purpose Timer 1 0x400E_8100 ACMPLP Low-Power Analog Comparator 0x400F_4000 CRC CRC Calculator 0x4010_8000 DOC Data Operation Circuit 0x4010_9000 SCI0 Serial Communication Interface 0 0x4011_8000 SCI1 Serial Communication Interface 1 0x4011_8100 SCI3 Serial Communication Interface 3 0x4011_8300 SCI4 Serial Communication Interface 4 0x4011_8400 SCI5 Serial Communication Interface 5 0x4011_8500 SCI9 Serial Communication Interface 9 0x4011_8900 SPI0 Serial Peripheral Interface 0 0x4011_A000 I3C I3C Bus Interface 0x4011_F000 ECCMB Error correction circuit for MBRAM 0x4012_F000 GPT320 General PWM 32-Bit Timer 0 0x4016_9000 GPT321 General PWM 32-Bit Timer 1 0x4016_9100 GPT162 General PWM 16-Bit Timer 2 0x4016_9200 GPT163 General PWM 16-Bit Timer 3 0x4016_9300 GPT164 General PWM 16-Bit Timer 4 0x4016_9400 GPT165 General PWM 16-Bit Timer 5 0x4016_9500 GPT_OPS Output Phase Switching Controller 0x4016_9A00 ADC120 12bit A/D Converter 0 0x4017_0000 DAC12 12-bit D/A converter 0x4017_1000 FLCN Flash I/O Registers 0x407E_C000 FACI Flash Application Command Interface 0x407F_E000 QSPI Quad-SPI 0x6400_0000 CPU_OCD On-Chip Debug 0x8000_0000 Note: Name = Peripheral name Description = Peripheral functionality Base address = Lowest reserved address or address used by the peripheral 3.2 Access Cycles This section provides access cycle information for the I/O registers described in this manual. RA4L1 Datasheet Appendix 3. I/O Registers R01DS0447EJ0131 Rev.1.31 May 26, 2026 Page 120 of 125 |
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