RA4L1 datasheet(76/125 Pages) RENESAS

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0.7 × VCC

0.3 × VCC

tCR

tCF

tHIGH

tDIG_H

tLOW

tDIG_L

Figure 2.43

tDIG_H and tDIG_L

ACK

SDA

RnW

ACK

SCL

SDR Transfer

0.7 × VCC

0.3 × VCC

0.7 × VCC

0.3 × VCC

= Open-Drain Pull-Up closs

= High Speed Active Push-Pull Drive

0.7 × VCC

SDA

ACK

0.3 × VCC

RnW

MST_SDA

0.7 × VCC

0.3 × VCC

0.7 × VCC

0.3 × VCC

SLV_SDA

SCL

tSCO*1

Timing

parameters used

tSU_OD

Open-Drain

tSCO*1

Open-Drain

or Push-Pull

tSU_PP

Push-Pull

0.7 × VCC

0.3 × VCC

Transition from

Open-Drain to

Push-Pull

SCL clocks are showm identical for OD and PP

even though they differ substantially

Note:

Open-Drain: Master releases SDA after a suitable delay from SCL edges

Push-Pull: Master drives SDA after a suitable delay from SCL edges

Note 1: tSCO is depicted for informative purposes only

= Active Drive by Master or Slave

= Open-Drain Pull-Up class by Master

= High-Z by Slave

Figure 2.44

I3C data transfer – ACK by slave

RA4L1 Datasheet

2. Electrical Characteristics

R01DS0447EJ0131 Rev.1.31

May 26, 2026

Page 76 of 125

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