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RA4L1 Folha de dados(PDF) 84 Page - Renesas Technology Corp |
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RA4L1 Folha de dados(HTML) 84 Page - Renesas Technology Corp |
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84 / 125 page ![]() tSR tHR tDTR SSIBCK0 (Input or Output) SSILRCK0/SSIFS0 (input), SSIRXD0 (input) SSILRCK0/SSIFS0 (output), SSITXD0 (output) Figure 2.55 SSIE data transmit and receive timing when SSICR.BCKP = 1 tDTRW SSILRCK0/SSIFS0 (input) SSITXD0 (output) MSB bit output delay after SSILRCK0/SSIFS0 change for slave transmitter when DEL = 1, SDTA = 0 or DEL = 1, SDTA = 1, SWL[2:0] = DWL[2:0] in SSICR. Figure 2.56 SSIE data output delay after SSILRCK0/SSIFS0 change 2.3.14 UARTA Timing Table 2.49 UARTA interface timing Parameter Symbol Min. Max. Unit Test conditions Transfer rate — 200 153600 bps — 2.3.15 CANFD Timing Table 2.50 CANFD interface timing Parameter Symbol CAN CANFD Unit Test conditions Min Max Min Max Internal delay time tnode — 100 — 75 ns Figure 2.57 Note: tnode = td(CTX) + td(CRX) RA4L1 Datasheet 2. Electrical Characteristics R01DS0447EJ0131 Rev.1.31 May 26, 2026 Page 84 of 125 |
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