ADP1053ACPZ-R7 datasheet(10/84 Pages) AD

10 / 84 page

ADP1053

Data Sheet

Rev. A | Page 10 of 84

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VS+_A

VS–_A

PGND_A

OVP_A

CS2–_A

CS2+_A

PGOOD_A

CS1_A

ACSNS

PSON_A

23 CS1_B

24 PGOOD_B

25 CS2+_B

26 CS2–_B

27 OVP_B

28 PGND_B

29 VS–_B

30 VS+_B

22 CS

21 PSON_B

ADP1053

TOP VIEW

(Not to Scale)

NOTES

1. THE EXPOSED PAD ON THE UNDERSIDE OF THE

PACKAGE SHOULD BE SOLDERED TO AGND.

Figure 4. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

VS+_A

Noninverting Input of the Voltage Sense ADC for Channel A Loop Control. This signal is referenced to VS−_A.

VS−_A

Inverting Input of the Voltage Sense ADC for Channel A Loop Control. There should be a low ohmic connection

to AGND.

PGND_A

Reference Pin for Channel A Overvoltage Protection (OVP_A).

OVP_A

Overvoltage Protection Comparator Input for Channel A. This signal is referenced to PGND_A.

CS2−_A

Inverting Input of the Differential Current Sense ADC for Channel A. The nominal voltage at this pin should be

1 V for optimal operation.

CS2+_A

Noninverting Input of the Differential Current Sense ADC for Channel A. The nominal voltage at this pin should

be 1 V for optimal operation.

PGOOD_A

Power-Good Output (Open-Drain) for Channel A. This signal is referenced to AGND. This pin is controlled by the

PGOOD_A flag and is driven low when the flag is set. The PGOOD_A flag is set when the POWER_SUPPLY_A, UVP_A,

EEPROM_CRC, or SOFTSTART_FILTER_A flag is set. The ACSNS and OTW1 flags can also be programmed to be included.

CS1_A

CS1 ADC Input and Fast Current Sense Input for Channel A. This signal is referenced to AGND.

ACSNS

AC Sense ADC and Feedforward Operation Input. This pin is connected upstream of the main inductor through a

resistor divider network. The nominal voltage at this pin should be 1 V. This signal is referenced to AGND.

PSON_A

Power Supply On Input for Channel A. This signal is referenced to AGND.

OUT1

OUT1 PWM Logic Output Drive. This pin is connected to the input of a FET driver; it can be disabled when not in