ADP1053ACPZ-R7 datasheet(80/84 Pages) AD

80 / 84 page

ADP1053

Data Sheet

Rev. A | Page 80 of 84

Table 131. Register 0xFEC1—Flag Register 2 and Register 0xFEC6—Latched Flag Register 2 (1 = Fault, 0 = Normal Operation)

Bits

Bit Name

R/W

Description

Action

POWER_SUPPLY_B

Channel B power supply is off and the PWM outputs are disabled.

This bit stays high until PSON_B is asserted.

None

PGOOD_B

Power-good fault on Channel B. This flag is set when the UVP_B,

POWER_SUPPLY_B, EEPROM_CRC, or SOFTSTART_FILTER_B flag

is set. The ACSNS and OTW2 flags can also be programmed to be

included.

0xFE09,

0xFE78,

0xFE8A

PGOOD_B pin

set low

CS1_B_OCP

The voltage at CS1_B is above the 1.2 V threshold.

0xFE00,

0xFE71

Programmable

CS2_B_OCP

The voltage at CS2_B is above its threshold.

0xFE01,

0xFE19

Programmable

UVP_B

VS_B is below its threshold.

0xFE03,

0xFE29

Programmable

OVP_B

OVP_B is above its threshold.

0xFE02,

0xFE27

Programmable

LIGHTLOAD_B

Channel B is in light load mode (CS2_B current is below the light

load threshold).

0xFE1B,

0xFE6A

Programmable

VS_SET_ERR_B

The intended VS_B reference setting is outside the allowed range.

0xFE1F,

0xFE21

None

Table 132. Register 0xFEC2—Flag Register 3 and Register 0xFEC7—Latched Flag Register 3 (1 = Fault, 0 = Normal Operation)

Bits

Bit Name

R/W

Description

Action

Reserved

Reserved.

VDD_OV

Overvoltage condition (VDD is above limit). The I2C interface

remains functional, but a PSON toggle is required to restart

the power supply.

0xFE06

Programmable

CS_OCP

The voltage at CS is above the 1.2 V threshold.

0xFE04,

0xFE6F

Programmable

OTP2

Temperature of Zone 2 is above the OTP2 threshold.

0xFE05,

0xFE76

Programmable

OTP1

Temperature of Zone 1 is above the OTP1 threshold.

0xFE05,

0xFE75

Programmable

ACSNS

ACSNS is below its threshold.

0xFE04,

0xFE78

Programmable

EEPROM_CRC

The downloaded EEPROM contents are incorrect.

Immediate

shutdown

FLAGIN

The external flag pin (FLGI/SYNI) is set.

0xFE06,

0xFE0F

Programmable

Table 133. Register 0xFEC3—Flag Register 4 and Register 0xFEC8—Latched Flag Register 4 (1 = Fault, 0 = Normal Operation)

Bits

Bit Name

R/W

Description

Action

Reserved

Reserved.

POWER_SUPPLY_C

Channel C power supply is off and the PWM outputs are disabled.

This bit stays high until PSON_C is asserted.

None

FLAGOUT

The FLGO/SYNO pin is set in response to the LIGHTLOAD_A or

LIGHTLOAD_B flag.

0xFE0F

None

EEPROM_UNLOCKED

The EEPROM is unlocked.

None

SOFTSTART_FILTER_B

Channel B soft start filter is in use.

0xFE3F

None

SOFTSTART_FILTER_A

Channel A soft start filter is in use.

0xFE3E

None

MODULATION_B

Channel B digital filter is at its minimum or maximum limit.

0xFE3D

None

MODULATION_A

Channel A digital filter is at its minimum or maximum limit.

0xFE3C

None

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