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ADP1053ACPZ-R7 Folha de dados(PDF) 45 Page - Analog Devices |
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ADP1053ACPZ-R7 Folha de dados(HTML) 45 Page - Analog Devices |
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45 / 84 page  Data Sheet ADP1053 Rev. A | Page 45 of 84 Command Name 0xFE58 OUT7 rising edge timing (MSBs) 0xFE59 OUT7 falling edge timing (MSBs) 0xFE5A OUT7 rising and falling edge timing (LSBs) 0xFE5B OUT7 settings 0xFE5C OUT8 rising edge timing (MSBs) 0xFE5D OUT8 falling edge timing (MSBs) 0xFE5E OUT8 rising and falling edge timing (LSBs) 0xFE5F OUT8 settings 0xFE60 PWM output pin disable GO Command Register 0xFE61 GO commands Balance Control Registers 0xFE62 Balance control on OUT1 and OUT2 0xFE63 Balance control on OUT3 and OUT4 0xFE64 Balance control on OUT5, OUT6, OUT7, and OUT8 Synchronization Setting Registers 0xFE65 OUT1 and OUT2 shutdown in Channel C synchronization 0xFE66 OUT1 through OUT8 dead time adjustment in synchronization SR and Channel C Soft Start Setting Registers 0xFE67 Synchronous rectifier (SR) soft start 0xFE68 Channel C soft start Light Load PWM Disable Registers 0xFE69 Channel A light load mode PWM output disable 0xFE6A Channel B light load mode PWM output disable Fast OCP and Channel C Current Sense Setting Registers 0xFE6B CS1_A blanking reference edge 0xFE6C CS1_B blanking reference edge 0xFE6D OUT3, OUT4, OUT7, and OUT8 cycle-by-cycle OCP response 0xFE6E CS gain trim 0xFE6F CS OCP settings 0xFE70 CS1_A OCP settings 0xFE71 CS1_B OCP settings 0xFE72 Balance control settings Temperature Sense and Protection Setting Registers 0xFE75 OTP1 threshold 0xFE76 OTP2 threshold ACSNS and Feedforward Setting Registers 0xFE77 ACSNS gain trim 0xFE78 ACSNS setting PSON Registers 0xFE79 Channel A PSON setting 0xFE7A Channel B PSON setting 0xFE7B Additional flag reenable delay and Channel C PSON setting Command Name RTD Trim Registers 0xFE73 RTD1 gain trim 0xFE74 RTD2 gain trim 0xFE7C RTD1 offset trim (MSB) 0xFE7D RTD1 offset trim (LSBs) 0xFE7E RTD2 offset trim (MSB) 0xFE7F RTD2 offset trim (LSBs) 0xFE80 RTD1 current source settings 0xFE81 RTD2 current source settings Customized Registers 0xFE82 Custom register 0xFE83 REVERSE_A/REVERSE_B flag configuration 0xFE84 REVERSE_A flag settings 0xFE85 REVERSE_B flag settings 0xFE86 VS_A slew rate for output voltage adjustment 0xFE87 VS_B slew rate for output voltage adjustment 0xFE88 Power supply software reset control 0xFE89 CS, CS1, and CS2 ADC update rate 0xFE8A OTW1/OTW2 settings Flag Registers 0xFEC0 Flag Register 1 0xFEC1 Flag Register 2 0xFEC2 Flag Register 3 0xFEC3 Flag Register 4 0xFEC4 Flag Register 5 0xFEC5 Latched Flag Register 1 0xFEC6 Latched Flag Register 2 0xFEC7 Latched Flag Register 3 0xFEC8 Latched Flag Register 4 0xFEC9 Latched Flag Register 5 0xFECA Channel A first flag ID 0xFECB Channel B first flag ID Value Registers 0xFED0 CS value 0xFED1 CS1_A value 0xFED2 CS1_B value 0xFED3 CS2_A value 0xFED4 CS2_B value 0xFED5 VS_A value 0xFED6 VS_B value 0xFED7 RTD1 value 0xFED8 RTD2 value 0xFED9 ACSNS value 0xFEDA Channel A duty cycle value 0xFEDB Channel B duty cycle value |
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