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ADP1053ACPZ-R7 Folha de dados(PDF) 4 Page - Analog Devices

Nome de Peças ADP1053ACPZ-R7
Descrição Electrónicos  3-Channel Digital
PDF  84 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

ADP1053ACPZ-R7 Folha de dados(HTML) 4 Page - Analog Devices

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ADP1053
Data Sheet
Rev. A | Page 4 of 84
The ADP1053 provides local and remote differential sensing
of the output voltage, which is converted to the digital domain
using high speed, high resolution Σ-Δ converters. The proprie-
tary conversion system maximizes the bandwidth of the converter
and minimizes output noise due to digital quantization error,
thus dramatically reducing the power consumption of the digital
controller.
Configurable compensation networks provide three poles and
two zeros to control feedback loop stability and optimize output
response. In addition, a programmable feedforward feature can
be enabled to enhance input voltage response.
The ADP1053 provides extensive protection and monitoring
capabilities. For example, each regulated output has its own
independent voltage threshold, and overvoltage protection is
provided for each regulated output. The protection and moni-
toring features combine to eliminate the possibility of a single
point of failure.
Fast overcurrent protection is provided to protect the system
from short circuits. Accurate current sensing and overcurrent
limit protections are also included. In addition, two overtemp-
erature protection circuits are provided for use with 100 kΩ
thermistors to sense the hot spots.
Other protection and monitoring features include a program-
mable power-on (PSON) function and power-good monitoring
for Channel A and Channel B.
All these features are programmable through the PMBus/I2C
interface. This interface is also used for calibration. Additional
information, such as input current, output current, and fault
flag status, can be read via the PMBus/I2C interface.
The built-in EEPROM is used to store programmed values and
instructions. System reliability is improved through a built-in
checksum and redundancy of critical circuits. In the event of a
system fault, the EEPROM can be configured to capture the first
instance of failure; this stored fault data can be analyzed to improve
overall system reliability and reduce failure mode analysis time.
The ADP1053 is designed to maximize ease of use and reduce
time to market with the provision of a comprehensive, easy to
use graphical user interface (GUI) that allows programming of
most parameters and protection and monitoring limits.
The ADP1053 is available in a 40-lead LFCSP package and
operates from a single 3.3 V supply.
FUNCTIONAL BLOCK DIAGRAM
ADP1053
ADC
ADC
ADC
ADC
ADC
ADC
DAC
DAC
PWM
ENGINE
DIGITAL CORE
1.2V
1.2V
1.2V
ADC
ADC
CS1_A
CS1_B
CS
OUT1
8kBYTE
EEPROM
I2C
INTERFACE
CS2+_A CS2–_A
CS2–_B CS2+_B
VS+_A VS–_A
VS–_B VS+_B
OVP_A PGND_A
PGND_B OVP_B
OUT3
OUT4
OUT2
OUT5
OUT6
OUT7
OUT8
PGOOD_A
FLGI/SYNI
FLGO/SYNO
PSON_A
PSON_B
PGOOD_B
RTD2
RTD1 ADD
ADC
ACSNS
ADC
UVLO
LDO
OSC
VREF
RES
VDD
DGND
VCORE
AGND
SDA
SCL
Figure 2.



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