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ADIN1300CCPZ-R7 Folha de dados(PDF) 19 Page - Analog Devices

Nome de Peças ADIN1300CCPZ-R7
Descrição Electrónicos  Robust, Industrial, Low Latency and Low Power 10 Mbps, 100 Mbps, and 1 Gbps Ethernet PHY
PDF  96 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

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Data Sheet
ADIN1300
THEORY OF OPERATION
analog.com
Rev. B | 19 of 96
OVERVIEW
The ADIN1300 is a low power, single port, Gigabit Ethernet trans-
ceiver with low latency specifications primarily designed for indus-
trial Ethernet applications. This design integrates an EEE PHY
core and all associated common analog circuitry, input and output
clock buffering, management interface and subsystem registers,
and MAC interface and control logic to manage the reset and clock
control and hardware pin configuration.
The ADIN1300 interfaces directly to twisted pair media through an
external transformer and is capable of supporting cable lengths up
to 150 meters at Gigabit speeds and 180 meters when operating at
100 Mbps or 10 Mbps speeds.
When the 10 Mbps speed is selected, the device operates by
default in 10BASE-Te mode using the 10BASE-Te transmit levels.
The ADIN1300 can be configured via software (using the B10eEn
bit, see Table 104) to operate 10BASE-T mode using the larger
10BASE-T transmit levels. The only difference between 10BASE-Te
and 10BASE-T is the transmit level. A PHY configured as 10BASE-
Te interoperates with a 10BASE-T PHY, assuming a normal Cat-5
cable is used.
The ADIN1300 provides a suite of diagnostic features enabling the
user to analyze the quality of the link during operation or while the
link is down.
Figure 19 shows a simplified overview of the main channel blocks.
ANALOG FRONT END (AFE)
The AFE stage consists of a hybrid stage, a programmable gain
amplifier (PGA), and an analog-to-digital convertor (ADC). The
function of the hybrid stage is to remove the transmitted signal
from the input signal, thereby allowing full-duplex operation on the
twisted pair. The PGA stage scales the incoming signal before it
reaches the ADC. The gain stage is controlled and adjusted based
on the output of the ADC to ensure the signal applied to the ADC is
maximized but within range of the ADC.
Physical Media Attachment (PMA)
The PMA block consists of the feed forward equalizer (FFE) stage,
which removes intersymbol interference (ISI).
The twisted pairs of Ethernet cables are not internally shielded from
each other, so signals transmitted on one pair couple across to the
other pairs. When a transmitter does not match to the line due to
mismatches or cable connectors, reflections are observed as an
echo. The echo and crosstalk estimates are subtracted from the
equalizer output.
Baseline wander is an artifact of the external transformer that
attenuates at low frequencies. When there are many symbols
with the same sign transmitted consecutively, the signal at the
receiver reduces. The baseline wander block monitors and corrects
to ensure the likelihood of receiving a symbol error is reduced.
Transmit Functions
1000BASE-T Mode
In 1000BASE-T, the PHY core encodes 8-bit data for transmission
by the PMA as a 4D five-level pulse amplitude modulation (PAM)
signal over the four pairs of cable.
100BASE-TX Mode
For the 100BASE-TX mode, the 4-bit data is first encoded into a
5-bit serial bit stream running at 125 Mbps. This is then sent to the
scrambler where it is encoded to a three-level multilevel transmit
(MLT3) format for transmission by the PMA.
10BASE-Te Mode
For the 10BASE-Te mode, the PHY transmits and receives Man-
chester-encoded data.
Receive Functions
1000BASE-T Mode
The PMA decodes the incoming 4D PAM signals into 8-bit data.
After performing compensation and after additional cleanup, the
PMA outputs the data to the receive pins of the MAC interface.
100BASE-TX Mode
The PMA decodes the incoming 3-level MLT3 sequence into 4‑bit
data after descrambling and 5-bit to 4-bit decoding.
10BASE-Te Mode
The core decodes the Manchester-encoded received signal.
Figure 19. Simplified Channel Block Diagram



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