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ADIN1300CCPZ-R7 Folha de dados(PDF) 30 Page - Analog Devices |
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ADIN1300CCPZ-R7 Folha de dados(HTML) 30 Page - Analog Devices |
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30 / 96 page ![]() Data Sheet ADIN1300 HARDWARE CONFIGURATION PINS analog.com Rev. B | 30 of 96 Table 23. Hardware Configuration Pins Configuration Function Functional Pin/Hardware Configuration Mnemonic1 Pin Levels Internal Pull-Down2 Default Configuration PHYAD_0 to PHYAD_3 Configuration RXD_3/PHYAD_3 2 Yes PHY Address 0x0 RXD_2/PHYAD_2 2 Yes RXD_1/PHYAD_1 2 Yes RXD_0/PHYAD_0 2 Yes Forced/Advertised PHY Speed, Software Power-Down Mode after Reset, Downspeed Enable, Energy Detect Power-Down Mode, Energy Efficient Ethernet LINK_ST/PHY_CFG1 4 None3 Unknown (external resistors are required) LED_0/COL/TX_ER/PHY_CFG0 4 None Auto MDIX GP_CLK/RX_ER/MDIX_MODE 4 None3 Unknown (external resistors are required) MAC Interface Selection RX_CTL/RX_DV/CRS_DV/MACIF_SEL1 2 Yes RGMII RXC/TXC 2 ns RXC/RX_CLK/MACIF_SEL0 2 Yes delay 1 Hardware configuration pin is the last pin name in the pin mnemonic. 2 The internal pull-down has a typical value of 45 kΩ. 3 Internal pull-down resistor only enabled while RESET_N is asserted. |
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