ADIN1300CCPZ-R7 datasheet(14/96 Pages) AD

14 / 96 page

Data Sheet

ADIN1300

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

analog.com

Rev. B | 14 of 96

Figure 10. Pin Configuration

Table 13. Pin Function Descriptions

Pin No.

Mnemonic

Supply Domain Description

Clock Interface

XTAL_O

AVDD_3P3

Second Terminal for Crystal Connection. If using a single-ended reference clock on XTAL_I/

CLK_IN/REF_CLK, leave XTAL_O open circuit.

XTAL_I/CLK_IN/REF_CLK

AVDD_3P3

Input for Crystal (XTAL_I).

Single-Ended 25 MHz Reference Clock (CLK_IN).

50 MHz RMII Reference Clock Input in RMII Mode (REF_CLK).

Management Interface

INT_N/CRS

VDDIO

Management Interface Interrupt Pin Output (INT_N). Active low output. A low on INT_N indicates

an unmasked management interrupt. This pin requires a 1.5 kΩ pull-up resistor to VDDIO.

MII Carrier Sense Output (CRS). Indicates the presence of a carrier to MAC.

MDC

Management Data Clock Input up to 5.5 MHz.

MDIO

Management Data Open-Drain Input/Output Synchronous to the MDC Clock. This pin requires a

1.5 kΩ pull-up resistor to VDDIO.

Reset

RESET_N

AVDD_3P3

Active Low Input. Hold low for >10 μs. This pin requires a1 kΩ pull-up resistor to AVDD_3P3.

Media Dependent

Interface (MDI)

MDI_0_P

AVDD_3P3

Transmit/Receive Differential Pair 0 Supporting 10 Mbps, 100 Mbps, and 1 Gbps.

MDI_0_N

AVDD_3P3

Transmit/Receive Differential Pair 0 Supporting 10 Mbps, 100 Mbps, and 1 Gbps.

MDI_1_P

AVDD_3P3

Transmit/Receive Differential Pair 1 Supporting 10 Mbps, 100 Mbps, and 1 Gbps.

MDI_1_N

AVDD_3P3

Transmit/Receive Differential Pair 1 Supporting 10 Mbps, 100 Mbps, and 1 Gbps.

MDI_2_P

AVDD_3P3

Transmit/Receive Differential Pair 2 for 1000BASE-T Mode. Unused in other modes.

MDI_2_N

AVDD_3P3

Transmit/Receive Differential Pair 2 for 1000BASE-T Mode. Unused in other modes.

MDI_3_P

AVDD_3P3

Transmit/Receive Differential Pair 3 for 1000BASE-T Mode. Unused in other modes.

MDI_3_N

AVDD_3P3

Transmit/Receive Differential Pair 3 for 1000BASE-T Mode. Unused in other modes.

MAC Interface

TXD_1

VDDIO

RGMII/RMII/MII Transmit Data 1 Input. See the MAC Interface section.

TXD_2

VDDIO

RGMII/MII Transmit Data 2 Input. See the MAC Interface section.

TXD_3

VDDIO

RGMII/MII Transmit Data 3 Input. See the MAC Interface section.

RXD_3/PHYAD_31

VDDIO

RGMII/MII Receive Data 3 Output (RXD_3). See the MAC Interface section.

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