ADIN1300CCPZ-R7 datasheet(4/96 Pages) AD

4 / 96 page

Data Sheet

ADIN1300

TABLE OF CONTENTS

analog.com

Rev. B | 4 of 96

Changes to Table 49......................................................................................................................................59

Changes to Table 51......................................................................................................................................60

Added Table 52..............................................................................................................................................61

Changes to Table 54......................................................................................................................................61

Changes to Table 55......................................................................................................................................62

Changes to Table 60......................................................................................................................................66

Added Frame Generator Interframe Gap Register Section and Table 93......................................................76

Changes to Table 99......................................................................................................................................78

Added Low Power Termination Register Section and Table 107................................................................... 81

Added LED Active Low Status Register Section and Table 120.................................................................... 85

Changes to Table 121....................................................................................................................................86

Changes to Table 122....................................................................................................................................86

Added Subsystem Interrupt Enable Register and Table 124......................................................................... 87

Added Subsystem Interrupt Status Register and Table 125.......................................................................... 87

Changes to Subsystem Clock Configuration Register Section and Table 126.............................................. 87

Changes to Table 127....................................................................................................................................88

Changes to Table 129....................................................................................................................................90

Added Subsystem Gigabit Ethernet PHY Interface Control Register Section and Table 130........................90

Added Subsystem 10BASE-T Preamble Generation Register Section and Table 131..................................91

Added Subsystem RGMII I/O Control Register Section and Table 132......................................................... 91

Added Subsystem Clock I/O Control Register Section and Table 133.......................................................... 91

Changes to PHY Package Layout Section.................................................................................................... 94

Changes to Crystal Placement and Routing Section..................................................................................... 94

Changes to MAC Interface Pins Section........................................................................................................94

10/2019—Revision 0: Initial Version

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