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ADIN1300CCPZ-R7 Folha de dados(PDF) 82 Page - Analog Devices

Nome de Peças ADIN1300CCPZ-R7
Descrição Electrónicos  Robust, Industrial, Low Latency and Low Power 10 Mbps, 100 Mbps, and 1 Gbps Ethernet PHY
PDF  96 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
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Data Sheet
ADIN1300
REGISTER SUMMARY
analog.com
Rev. B | 82 of 96
Table 109. Bit Descriptions for CDIAG_XPAIR_DIS (Continued)
Bits
Bit Name
Description
Reset
Access
0
CDIAG_XPAIR_DIS
When set, this bit disables cross pair fault checking.
0x0
R/W
1: disable cross pair fault checking.
0: enable cross pair fault checking.
Cable Diagnostics Results 0 Register
Address: 0xBA1D, Reset: 0x0000, Name: CDIAG_DTLD_RSLTS_0
This register provides cable diagnostics results for Pair 0.
Table 110. Bit Descriptions for CDIAG_DTLD_RSLTS_0
Bits
Bit Name
Description
Reset
Access
[15:11]
RESERVED
Reserved.
0x0
R
10
CDIAG_RSLT_0_BSY
When set, this bit indicates that Pair 0 is busy. This bit indicates that there was unknown activity on
Pair 0 during cable diagnostics.
0x0
R
9
CDIAG_RSLT_0_XSIM_3
When set, this bit indicates that there is a significant impedance cross pair short between Pair 0 and
Pair 3.
0x0
R
8
CDIAG_RSLT_0_XSIM_2
When set, this bit indicates that there is a significant impedance cross pair short between Pair 0 and
Pair 2.
0x0
R
7
CDIAG_RSLT_0_XSIM_1
When set, this bit indicates that there is a significant impedance cross pair short between Pair 0 and
Pair 1.
0x0
R
6
CDIAG_RSLT_0_SIM
When set, this bit indicates that there is a significant impedance mismatch on Pair 0.
0x0
R
5
CDIAG_RSLT_0_XSHRT_3
When set, this bit indicates that there is a cross pair short between Pair 0 and Pair 3.
0x0
R
4
CDIAG_RSLT_0_XSHRT_2
When set, this bit indicates that there is a cross pair short between Pair 0 and Pair 2.
0x0
R
3
CDIAG_RSLT_0_XSHRT_1
When set, this bit indicates that there is a cross pair short between Pair 0 and Pair 1.
0x0
R
2
CDIAG_RSLT_0_SHRT
When set, this bit indicates that there is a short on Pair 0.
0x0
R
1
CDIAG_RSLT_0_OPN
When set, this bit indicates that there is an open on Pair 0.
0x0
R
0
CDIAG_RSLT_0_GD
When set, this bit indicates that Pair 0 is well terminated.
0x0
R
Cable Diagnostics Results 1 Register
Address: 0xBA1E, Reset: 0x0000, Name: CDIAG_DTLD_RSLTS_1
This register provides cable diagnostics results for Pair 1.
Table 111. Bit Descriptions for CDIAG_DTLD_RSLTS_1
Bits
Bit Name
Description
Reset
Access
[15:11]
RESERVED
Reserved.
0x0
R
10
CDIAG_RSLT_1_BSY
When set, this bit indicates Pair 1 is busy. This bit indicates that there was unknown activity on Pair 1
during cable diagnostics.
0x0
R
9
CDIAG_RSLT_1_XSIM_3
When set, this bit indicates that there is a significant impedance cross pair short between Pair 1 and
Pair 3.
0x0
R
8
CDIAG_RSLT_1_XSIM_2
When set, this bit indicates that there is a significant impedance cross pair short between Pair 1 and
Pair 2.
0x0
R
7
CDIAG_RSLT_1_XSIM_0
When set, this bit indicates that there is a significant impedance cross pair short between Pair 1 and
Pair 0.
0x0
R
6
CDIAG_RSLT_1_SIM
When set, this bit indicates that there is a significant impedance mismatch on Pair 1.
0x0
R



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