ST6373 datasheet(34/64 Pages) STMICROELECTRONICS

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ST6373

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4.1.3 I/O Port Registers

4.1.3.1 Data Registers

Ports A, B, C Data Register

Address: C0h (PA), C1h (PB), C2h (PC) -

Read/Write

Reset Value: 00h

PA7-PA0. These are the I/O Port A data bits. Re-

set at power-on.

PB7-PB0. These are the I/O Port B data bits. Re-

set at power-on.

PC7-PC0. These are the I/O Port C data bits. Set

to 04H at power-on. Bit 2 (PC2 pin) is set to one

(open-drain therefore high impedance).

4.1.3.2 Data Direction Registers

Ports A, B, C Data Direction Register

Address: C4h (PA), C5h (PB), C6h (PC) -

Read/Write

Reset Value: 00h

PA7-PA0. These are the I/O Port A data direction

bits. When a bit is cleared to zero the related I/O

line is in input mode, if bit is set to one the related

I/O line is in output mode. Reset at power-on.

PB7-PB0. These are the I/O Port B data direction

bits. When a bit is cleared to zero the related I/O

line is in input mode, if bit is set to one the related

I/O line is in output mode. Reset at power-on.

PC7-PC0. These are the I/O Port C data direction

bits. When a bit is cleared to zero the related I/O

line is in input mode, if bit is set to one the related

I/O line is in output mode. Set to 04H at power-on.

Bit 2 (PC2 pin) is set to one (output mode select-

ed).

4.1.3.3 Option Registers

Port A, B, C Option Register

Address: CCh (PA), CDh (PB) - Read/Write

Reset value:00h

PA7-PA0. These are the I/O Port A option bits.

These are set in conjunction with the correspond-

ing data and data direction bits to set the individual

Port A bit I/O mode.

PB7-PB0. These are the I/O Port B option bits.

These are set in conjunction with the correspond-

ing data and data direction bits to set the individual

Port B bit I/O mode.

Notes: The WAIT instruction allows the MCU to be

used in situations where low power consumption is

required. This can only be achieved, however, if

the I/O pins are programmed as inputs with well

defined logic levels or have no power consuming

resistive loads in output mode.

Single-bit operations on I/O registers are possible

but care is necessary because reading in input

mode is from I/O pins while writing will directly af-

fect the Port data register.

PA/PB

/PC7

PA/P B

/PC6

PA/PB

/PC5

PA/PB

/PC4

PA/PB

/PC3

PA/PB

/PC2

PA/PB

/PC1

PA/PB

/PC0

PA/PB

/PC7

PA/P B

/PC6

PA/PB

/PC5

PA/PB

/PC4

PA/PB

/PC3

PA/PB

/PC2

PA/PB

/PC1

PA/PB

/PC0

PA/PB7 PA/PB6 PA/PB5 PA/P B4PA/PB3 PA/PB2 PA/PB1 PA/P B0

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