ST6373 datasheet(14/64 Pages) STMICROELECTRONICS

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ST6373

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MEMORY SPACES (Cont’d)

Additional Notes on Parallel Mode. If the user

wants to perform a parallel programming the first

action should be the setting of the PE bit; from this

moment, the first time the EEPROM will be ad-

dressed in writing, the ROW address will be

latched and it will be possible to change it only at

the end of the programming procedure or by reset-

setting PE without programming the EEPROM.

After the ROW address latching the Core can

“see” just one EEPROM row (the selected one)

and any attempt to write or read other rows will

produce errors. Do not read the EEPROM while

PE is set.

As soon as PE bit is set, the 8 volatile ROW latch-

es are cleared. From this moment the user can

load data in the whole ROW or just in a subset. PS

setting will modify the EEPROM registers corre-

sponding to the ROW latches accessed after PE.

For example, if the software sets PE and accesses

EEPROM in writing at addresses 18h,1Ah,1Bh

and then sets PS, these three registers will be

modified at the same time; the remaining bytes will

have no particular content. Note that PE is inter-

nally reset at the end of the programming proce-

dure. This implies that the user must set PE bit be-

tween two parallel programming procedures. Any-

way the user can set and then reset PE without

performing any EEPROM programming. PS is a

set only bit and is internally reset at the end of the

programming procedure. Note that if the user tries

to set PS while PE is not set there will not be any

programming procedure and the PS bit will be un-

affected. Consequently PS bit can not be set if EN

is low. PS can be affected by the user set if, and

only if, EN and PE bits are also set to one.

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