ST6373 datasheet(25/64 Pages) STMICROELECTRONICS

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ST6373

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INTERRUPTS (Cont’d)

3.4.4 Interrupt Procedure

The interrupt procedure is very similar to a call pro-

cedure; the user can consider the interrupt as an

asynchronous call procedure. As this is an asyn-

chronous event the user does not know about the

context and the time at which it occurred. As a re-

sult the user should save all the data space regis-

ters which will be used inside the interrupt rou-

tines. There are separate sets of processor flags

for normal, interrupt and non-maskable interrupt

modes which are automatically switched and so

these do not need to be saved.

The following list summarizes the interrupt proce-

dure (refer also to Figure 20. Interrupt Processing

Flow Chart):

– Interrupt detection

– The flags C and Z of the main routine are ex-

changed with the flags C and Z of the interrupt

routine (resp. the NMI flags)

– The value of the PC is stored in the first level of

the stack - The normal interrupt lines are inhibit-

ed (NMI still active)

– The edge flip-flop is reset

– The related interrupt vector is loaded in the PC.

– User selected registers are saved inside the in-

terrupt service routine (normally on a software

stack)

– The source of the interrupt is found by polling (if

more than one source is associated to the same

vector)

– Interrupt servicing

– Return from interrupt (RETI)

– Automatically the MCU Core switches back to

the normal flags (resp. the interrupt flags) and

pops the previous PC value from the stack

The interrupt routine begins usually by the identifi-

cation of the device that has generated the inter-

rupt request. The user should save the registers

which are used inside the interrupt routine (that

holds relevant data) into a software stack.

After the RETI instruction execution, the Core car-

ries out the previous actions and the main routine

can continue.

Figure 18. Interrupt Processing Flow-Chart

3.4.5 ST6373 Interrupt Details

Interrupt #0. The NMI Interrupt is connected to the

first interrupt #0 (NMI, Pin 27). If the NMI interrupt

is disabled at the latch circuitry, then it will be high.

The #0 interrupt input detects a high to low level.

Note that once #0 has been latched, then the only

way to remove the latched #0 signal is to service

the interrupt. #0 can interrupt the other interrupts.

LOAD PC FROM

INTERRUPT VECTOR

( FFC / FFD )

SET

INTERRUPT MASK

PUSH THE

PC INTO THE STACK

SELECT

INTERNAL MODE FLAG

CHECK IF THERE IS

AN INTERRUPT REQUEST

AND INTERRUPT MASK

INSTRUCTION

WAS

THE INSTRUCTION

A RETI

IS THE CORE

ALREADY IN

NORMAL MODE ?

FETCH

INSTRUCTION

EXECUTE

INSTRUCTION

CLEAR

INTERRUPT MASK

SELECT

PROGRAM FLAGS

” POP ”

THE STACKED PC

YES

VA 000014

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