ADIN1300BCPZ-R7 datasheet(61/96 Pages) AD

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Data Sheet

ADIN1300

analog.com

Rev. B | 61 of 96

Table 52. CLK_CNTRL Settings

CLK_CNTRL

RX_CLK

TX_CLK

No Link

1000 Mbps Link

000

2.5 MHz

Off

001

25 MHz

2.5 MHz

Off

010

125 MHz

25 MHz

Off

011

125 MHz

25 MHz

Off

100 (Default)

2.5 MHz

101

25 MHz

110

125 MHz

2.5 MHz

111

125 MHz

25 MHz

PHY Control 3 Register

Address: 0x0017, Reset: 0x3048, Name: PHY_CTRL_3

This register provides access to PHY control register bits for link enable and autonegotiation controls.

Table 53. Bit Descriptions for PHY_CTRL_3

Bits

Bit Name

Description

Reset

Access

[15:14]

RESERVED

Reserved.

0x0

LINK_EN

Setting this bit enables linking. If linking is disabled, the PHY enters the standby state and does not

attempt to bring up links. The standby state can be used to run diagnostics, including cable diagnostics.

0x1

R/W

1: enable linking.

0: disable linking.

[12:10]

NUM_SPEED_RETRY

If downspeed is enabled, this register bit specifies the number of retries the PHY must attempt to bring up

a link at the advertised speed before advertising a lower speed. By default, the PHY attempts to bring up a

link 5 times (4 retries) before downspeeding.

0x4

R/W

[9:0]

RESERVED

Reserved.

0x48

R/W

Interrupt Mask Register

Address: 0x0018, Reset: 0x0000, Name: IRQ_MASK

The interrupt mask register allows interrupts to be masked or unmasked.

Table 54. Bit Descriptions for IRQ_MASK

Bits

Bit Name

Description

Reset

Access

[15:11]

RESERVED

Reserved.

0x0

R/W

CBL_DIAG_IRQ_EN

Cable Diagnostics Interrupt Enable Bit.

0x0

R/W

1: enable cable diagnostics interrupt.

0: disable cable diagnostics interrupt.

MDIO_SYNC_IRQ_EN

MDIO Synchronization Lost Interrupt Enable Bit.

0x0

R/W

1: enable MDIO synchronization lost interrupt.

0: disable MDIO synchronization lost interrupt.

AN_STAT_CHNG_IRQ_EN

Autonegotiation Status Changed Interrupt Enable Bit.

0x0

R/W

1: enable autonegotiation status changed interrupt.

0: disable autonegotiation status changed interrupt.

FC_FG_IRQ_EN

Frame checker/generator interrupt enable bit.

1: enabled frame checker/generator interrupt

0x0

R/W

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