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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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ADIN1300BCPZ-R7 Folha de dados(PDF) 49 Page - Analog Devices |
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ADIN1300BCPZ-R7 Folha de dados(HTML) 49 Page - Analog Devices |
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49 / 96 page  Data Sheet ADIN1300 REGISTER SUMMARY analog.com Rev. B | 49 of 96 Table 32. MDIOMAP_GEPHY Register Summary (Continued) Address Name Description Reset Access 0x941C FG_NFRM_H Frame Generator Number of Frames High Register. 0x0000 R/W 0x941D FG_NFRM_L Frame Generator Number of Frames Low Register. 0x0100 R/W 0x941E FG_DONE Frame Generator Done Register. 0x0000 R 0x9427 FIFO_SYNC FIFO Sync Register. 0x0000 R/W 0x9428 SOP_CTRL Start of Packet Control Register. 0x0034 R/W 0x9429 SOP_RX_DEL Start of Packet Receive Detection Delay Register. 0x0000 R/W 0x942A SOP_TX_DEL Start of Packet Transmit Detection Delay Register. 0x0000 R/W 0x9602 DPTH_MII_BYTE Control of FIFO Depth for MII Modes Register. 0x0001 R/W 0xA000 LPI_WAKE_ERR_CNT LPI Wake Error Count Register. 0x0000 R 0xA001 B_1000_RTRN_EN Base 1000 Retrain Enable Register. 0x0000 R/W 0xB403 B_10E_En Base 10e Enable Register. 0x0001 R/W 0xB412 B_10_TX_TST_MODE 10BASE-T Transmit Test Mode Register. 0x0000 R/W 0xB413 B_100_TX_TST_MODE 100BASE-TX Transmit Test Mode Register. 0x0000 R/W 0xB685 B_100_ZPTM_EN_DIMRX Low power termination for receive dimension 100BASE-TX Register. 0x0001 R/W 0xBA1B CDIAG_RUN Run Automated Cable Diagnostics Register. 0x0000 R/W 0xBA1C CDIAG_XPAIR_DIS Cable Diagnostics Cross Pair Fault Checking Disable Register. 0x0000 R/W 0xBA1D CDIAG_DTLD_RSLTS_0 Cable Diagnostics Results 0 Register. 0x0000 R 0xBA1E CDIAG_DTLD_RSLTS_1 Cable Diagnostics Results 1 Register. 0x0000 R 0xBA1F CDIAG_DTLD_RSLTS_2 Cable Diagnostics Results 2 Register. 0x0000 R 0xBA20 CDIAG_DTLD_RSLTS_3 Cable Diagnostics Results 3 Register. 0x0000 R 0xBA21 CDIAG_FLT_DIST_0 Cable Diagnostics Fault Distance Pair 0 Register. 0x00FF R 0xBA22 CDIAG_FLT_DIST_1 Cable Diagnostics Fault Distance Pair 1 Register. 0x00FF R 0xBA23 CDIAG_FLT_DIST_2 Cable Diagnostics Fault Distance Pair 2 Register. 0x00FF R 0xBA24 CDIAG_FLT_DIST_3 Cable Diagnostics Fault Distance Pair 3 Register. 0x00FF R 0xBA25 CDIAG_CBL_LEN_EST Cable Diagnostics Cable Length Estimate Register. 0x00FF R 0xBC00 LED_PUL_STR_DUR LED Pulse Stretching Duration Register. 0x0011 R/W 0xBC01 LED_A_INV_EN LED Active Low Status Register. 0x0000 R/W PHY CORE REGISTER DETAILS MII Control Register Address: 0x0000, Reset: 0x1040, Name: MII_CONTROL This address corresponds to the MII control register specified in Clause 22.2.4.1 of Standard 802.3. Note that the default reset value of this register is dependent on the hardware configuration pins settings. Table 33. Bit Descriptions for MII_CONTROL Bits Bit Name Description Reset Access 15 SFT_RST Software Reset Bit. Note that this bit is self clearing. When the reset operation is complete, this bit returns to 1'b0. 0x0 R/W 1: PHY reset. 0: normal operation. 14 LOOPBACK Enable/Disable Loopback Mode. 0x0 R/W 1: enable loopback mode. 0: disable loopback mode. |
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