ADIN1300BCPZ-R7 datasheet(36/96 Pages) AD

36 / 96 page

Data Sheet

ADIN1300

ON-CHIP DIAGNOSTICS

analog.com

Rev. B | 36 of 96

FRAME GENERATOR AND CHECKER

The ADIN1300 can be configured to generate frames and to check

received frames (see Figure 29). The frame generator and checker

can be used independently to just generate frames or just check

frames or can be used together to simultaneously generate frames

and check frames. If frames are looped back at the remote end,

the frame checker can be used to check frames generated by the

ADIN1300.

When the frame generator is enabled, the source of data for the

PHY comes from the frame generator and not the MAC interface.

To use the frame generator, the diagnostic clock must also be ena-

bled (DIAG_CLK_EN bit, PHY_CTRL_1 register, Address 0x0012).

The frame generator control registers configure the type of frames

to be sent (random data, all 1s), the frame length, and the number

of frames to be generated. The generation of the requested frames

starts by enabling the frame generator (set the FG_EN bit, Address

0x9415). When the generation of the frames is completed, the

frame generator done bit is set (FG_DONE bit, Address 0x941E).

The frame checker is enabled using the frame checker enable

bit (FC_EN bit, Address 0x9403). The frame checker can be config-

ured to check and analyze received frames from either the MAC

interface or the PHY, which is configured using the frame checker

transmit select bit (FC_TX_SEL bit, Address 0x9407). The frame

checker reports the number of frames received, cyclic redundancy

check (CRC) errors, and various other frame errors. The frame

checker frame counter register and frame checker error counter

The frame checker counts the number of CRC errors and these

are reported in the receive error counter register (RX_ERR_CNT

frame checker error counter and frame checker frame counters, all

of the counters are latched when the receive error counter register

is read. Therefore, when using the frame checker, read the receive

error counter first, and then read all other frame counters and error

counters. A latched copy of the receive frame counter register is

available in the FC_FRM_CNT_H register and FC_FRM_CNT_L

In addition to CRC errors, the frame checker counts frame length

errors, frame alignment errors, symbol errors, oversized frame

errors, and undersized frame errors. In addition to the received

frames, the frame checker counts frames with an odd number of

nibbles in the frame in 100BASE-TX mode or 10BASE-Te mode,

and counts frames with an odd number of nibbles in the preamble

in 100BASE-TX mode. The frame checker also counts frames

with a noninteger number of nibbles in 10BASE-Te mode and the

number of false carrier events, which is a count of the number of

times the bad start of stream delimiter (SSD) state is entered.

Frame Generator and Checker Used with

Remote Loopback with Two PHYs

Using two PHY devices, the user can configure a convenient self

contained validation of the PHY to PHY connection. Figure 30

shows an overview of how each PHY is configured. An external

Ethernet cable is connected between both devices, and PHY1 is

generating frames using the frame generator. PHY2 has remote

loopback enabled on the MAC side. The frames issued by PHY1

are sent through the cable, through the PHY2 signal chain returned

by PHY2 remote loopback, back again through the Ethernet cable,

and checked by the PHY1 frame checker.

Figure 30. Remote Loopback Used Across Two PHYs for Self Check Purposes

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