TPS6521825_V01 datasheet(13/109 Pages) TI1

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TPS6521825

www.ti.com

SLDS260 – NOVEMBER 2019

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Specifications

Electrical Characteristics (continued)

Over operating free-air temperature range (unless otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

(2)

IN_BU has priority over CC input.

(3)

For PHP package: 160 mVpp at -40°C, and 120 mVpp from 25°C to 105°C.

VOV

Overvoltage detection threshold

VOUT rising, STRICT = 1b

104%

104.5%

105%

Hysteresis

VOUT falling, STRICT = 1b

0.25%

Deglitch

VOUT rising, STRICT = 1b

µs

IINRUSH

Inrush current

VIN_DCDC4 = 3.3 V ≤ VINDCDC4 ≤ 5.5 V; 40 µF ≤ COUT

≤ 100 µF

500

RDIS

Discharge resistor

150

250

350

Nominal inductor value

See Table 6-2.

1.2

1.5

2.2

µH

Tolerance

–30%

30%

COUT

Output capacitance value

Ceramic, X5R or X7R, see Table 6-3.

100

µF

DCDC5 and DCDC6 POWER PATH

VCC

DCDC5 and DCDC6 input

voltage range.

VIN_BU = 0 V

2.2

3.3

VIN_BU

DCDC5 and DCDC6 input

voltage range(2)

2.2

5.5

tRISE

VCC, VIN_BU rise time

VCC = 0 V to 3.3 V, VIN_BU = 0 V to 5.5 V

µs

RDS(ON)

Power path switch impedance

CC to SYS_BU

VCC = 2.4 V, VIN_BU = 0 V

14.5

Power path switch impedance

IN_BU to SYS_BU

VIN_BU = 3.6 V

10.5

ILEAK

Forward leakage current

Into CC pin;

VCC = 3.3 V, VIN_BU = 0 V;

OFF state; FSEAL = 0b;

over full temperature range

300

Reverse leakage current

Out of CC pin;

VCC = 1.5 V; VIN_BU = 5.5 V;

over full temperature range

500

RCC

Acceptable CC source

impedance

IOUT, DCDC5 < 10 µA;

IOUT, DCDC6 < 10 µA

1000

Quiescent current

Average current into CC pin; RECOVERY or OFF

state; VIN_BU = 0 V; VCC = 2.4 V; DCDC5 and

DCDC6 enabled, no load TJ = 25°C

350

QINRUSH

Inrush charge

VIN_BIAS = decaying; CC = 3 V; CSYS_BU = 1 µF;

SYS_BU = 2.3 V to 3 V; CCseries_resist = 10 Ω CCC =

4.7 µF

720

DCDC5 (1-V BATTERY BACKUP SUPPLY)

VDCDC5

Output voltage

DC accuracy

2.7 V

≤ VIN_BU ≤ 5.5 V;

1.5 µA

≤ IOUT ≤ 25 mA

–40°C

≤ TA < 0°C

–2.5%

2.5%

2.7 V

≤ VIN_BU ≤ 5.5 V

1.5 µA

≤ IOUT ≤ 25 mA

0°C

≤ TA < 105°C

–2%

2.2 V

≤ VCC ≤ 3.3 V; VIN_BU = 0;

1.5 µA

≤ IOUT ≤ 100 µA

–2.5%

2.5%

Output voltage ripple

L = 10 µH; COUT = 22 µF; 100-µA load, occurs

during band-gap sampling

32(3) mVpp

IOUT

Continuous output current

2.2 V

≤ VCC ≤ 3.3 V

VIN_BU = 0 V

100

µA

2.7 V

≤ VIN_BU ≤ 5.5 V

RDS(ON)

High-side FET on resistance

VIN_BU = 2.8 V

2.5

3.5

Low-side FET on resistance

VIN_BU = 2.8 V

ILIMIT

High-side current limit

VIN_BU = 2.8 V

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