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TPS6521825 Folha de dados(PDF) 5 Page - Texas Instruments |
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TPS6521825 Folha de dados(HTML) 5 Page - Texas Instruments |
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5 / 109 page ![]() 1 IN_DCDC1 36 IN_BIAS 2 SDA 35 INT_LDO 3 SCL 34 GPO2 4 LDO1 33 LS2 5 IN_LDO1 32 IN_LS2 6 IN_LS3 31 IN_LS1 7 LS3 30 LS1 8 PGOOD 29 N/C 9 AC_DET 28 N/C 10 nPFO 27 IN_BU 11 GPIO1 26 GPIO3 12 IN_DCDC4 25 CC Not to scale Thermal Pad 5 TPS6521825 www.ti.com SLDS260 – NOVEMBER 2019 Submit Documentation Feedback Product Folder Links: TPS6521825 Pin Configuration and Functions Copyright © 2019, Texas Instruments Incorporated 3 Pin Configuration and Functions Figure 3-1 shows the 48-pin RSL Plastic Quad Flatpack No-Lead. Figure 3-1. 48-Pin RSL VQFN With Exposed Thermal Pad (Top View, 6 mm × 6 mm × 1 mm With 0.4-mm Pitch) 3.1 Pin Functions Pin Functions PIN TYPE DESCRIPTION NO. NAME 1 IN_DCDC1 P Input supply pin for DCDC1. 2 SDA I/O Data line for the I2C interface. Connect to pullup resistor. 3 SCL I Clock input for the I2C interface. Connect to pullup resistor. 4 LDO1 O Output voltage pin for LDO1. Connect to capacitor. 5 IN_LDO1 P Input supply pin for LDO1. 6 IN_LS3 P Input supply pin for load switch 3. 7 LS3 O Output voltage pin for load switch 3. Connect to capacitor. 8 PGOOD O Power-good output (configured as open drain). Pulled low when either DCDC1-4 or LDO1 are out of regulation. Load switches and DCDC5-6 do not affect PGOOD pin. 9 AC_DET I AC monitor input and enable for DCDC1-4, LDO1 and load switches. See Section 5.4.1 for details. Tie pin to IN_BIAS if not used. 10 nPFO O Power-fail comparator output, deglitched (open drain). Pin is pulled low when PFI input is below power-fail threshold. |
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