TPS6521825_V01 datasheet(69/109 Pages) TI1

Nome de Peças	TPS6521825

Descrição Electrónicos	TPS6521825 Power Management IC (PMIC) for NXP i.MX 8M Mini

PDF	109 Pages

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Fabricante Electrônico	TI1 [Texas Instruments]

Página de início	http://www.ti.com

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TPS6521825

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SLDS260 – NOVEMBER 2019

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Detailed Description

5.6.4.16 DCDC2 Register (subaddress = 0x17) [reset = 0x99]

DCDC2 is shown in Figure 5-51 and described in Table 5-23.

Return to Summary Table.

Note 1: This register is password protected. For more information, see Section 5.6.1.

Note 2: A 5-ms blanking time of the over-voltage and under-voltage monitoring occurs when a write is

performed on the DCDC2 register.

Note 3: To change the output voltage of DCDC2, the GO bit or the GODSBL bit must be set to 1b in

Figure 5-51. DCDC2 Register

PFM

RESERVED

DCDC2

R/W-1b

R-0b

R/W-19h

Table 5-23. DCDC2 Register Field Descriptions

Bit

Field

Type

Reset

Description

PFM

R/W

Pulse frequency modulation (PFM, also known as pulse-skip-mode)

enable. PFM mode improves light-load efficiency. Actual PFM mode

operation depends on load condition.

0b = Disabled (forced PWM)

1b = Enabled

RESERVED

TPS6521825 Folha de dados(PDF) 69 Page - Texas Instruments