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TPS6521825 Folha de dados(PDF) 6 Page - Texas Instruments |
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TPS6521825 Folha de dados(HTML) 6 Page - Texas Instruments |
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6 / 109 page ![]() 6 TPS6521825 SLDS260 – NOVEMBER 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TPS6521825 Pin Configuration and Functions Copyright © 2019, Texas Instruments Incorporated Pin Functions (continued) PIN TYPE DESCRIPTION NO. NAME 11 GPIO1 I/O Pin configured as DDR reset-input (driving GPO2) or as general-purpose, open-drain output. See Section 5.3.1.14 for more information. 12 IN_DCDC4 P Input supply pin for DCDC4. 13 L4A P Switch pin for DCDC4. Connect to inductor. 14 L4B P Switch pin for DCDC4. Connect to inductor. 15 DCDC4 P Output voltage pin for DCDC4. Connect to capacitor. 16 PFI I Power-fail comparator input. Connect to resistor divider. 17 DC34_SEL I Power-up default selection pin for DCDC3 or DCDC4. Power-up default is programmed by a resistor connected to ground. See Section 5.3.1.13 for resistor options. 18 IN_nCC O Output pin indicates if DCDC5 and DCDC6 are powered from main supply (IN_BU) or coin-cell battery (CC). Pin is push-pull output. Pulled low when PMIC is powered from coin cell battery. Pulled high when PMIC is powered from main supply (IN_BU). 19 PGOOD_BU O Power-good, push-pull output for DCDC5 and DCDC6. Pulled low when either DCDC5 or DCDC6 is out of regulation. Pulled high (to DCDC6 output voltage) when both rails are in regulation. 20 L5 P Switch pin for DCDC5. Connect to inductor. 21 FB5 I Feedback voltage pin for DCDC5. Connect to output capacitor. 22 FB6 I Feedback voltage pin for DCDC6. Connect to output capacitor. 23 L6 P Switch pin for DCDC6. Connect to inductor. 24 SYS_BU P System voltage pin for battery-backup supply power path. Connect to 1-µF capacitor. Connecting any external load to this pin is not recommended. 25 CC P Coin cell battery input. Serves as the supply to DCDC5 and DCDC6 if no voltage is applied to IN_BU. Tie this pin to ground if it is not in use. 26 GPIO3 I/O Pin can be configured as warm reset (negative edge) for DCDC1 and DCDC2 or as a general-purpose, open- drain output. See Section 5.3.1.14 for more details. 27 IN_BU P Default input supply pin for battery backup supplies (DCDC5 and DCDC6). 28 N/C — No connect. Leave pin floating. 29 N/C 30 LS1 O Output voltage pin for load switch 1. Connect to capacitor. 31 IN_LS1 P Input supply pin for load switch 1. 32 IN_LS2 P Input supply pin for load switch 2. 33 LS2 O Output voltage pin for load switch 2. Connect to capacitor. 34 GPO2 O Pin configured as DDR reset signal (controlled by GPIO1) or as general-purpose output. Buffer can be configured as push-pull or open-drain. 35 INT_LDO P Internal bias voltage. Connect to a 1-μF capacitor. TI does not recommended connecting any external load to this pin. 36 IN_BIAS P Input supply pin for reference system. 37 IN_DCDC3 P Input supply pin for DCDC3. 38 L3 P Switch pin for DCDC3. Connect to inductor. 39 FB3 I Feedback voltage pin for DCDC3. Connect to output capacitor. 40 nWAKEUP O Signal to SOC to indicate a power on event (active low, open-drain output). 41 FB2 I Feedback voltage pin for DCDC2. Connect to output capacitor. 42 L2 P Switch pin for DCDC2. Connect to inductor. 43 IN_DCDC2 P Input supply pin for DCDC2. 44 PB I Push-button monitor input. Typically connected to a momentary switch to ground (active low). See Section 5.4.1 for details. 45 nINT O Interrupt output (active low, open drain). Pin is pulled low if an interrupt bit is set. The pin returns to Hi-Z state after the bit causing the interrupt has been read. Interrupts can be masked. 46 PWR_EN I Power enable input for DCDC1-4, LDO1 and load switches. See Section 5.4.1 for details. 47 FB1 I Feedback voltage pin for DCDC1. Connect to output capacitor. 48 L1 P Switch pin for DCDC1. Connect to inductor. |
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