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TPS6521825 Folha de dados(PDF) 10 Page - Texas Instruments |
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TPS6521825 Folha de dados(HTML) 10 Page - Texas Instruments |
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10 / 109 page ![]() 10 TPS6521825 SLDS260 – NOVEMBER 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TPS6521825 Specifications Copyright © 2019, Texas Instruments Incorporated 4.5 Electrical Characteristics Over operating free-air temperature range (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT VOLTAGE AND CURRENTS VIN_BIAS Input supply voltage range Normal operation 2.7 5.5 V EEPROM programming 4.5 5.5 Deglitch time 5 ms IOFF OFF state current, total current into IN_BIAS, IN_DCDCx, IN_LDO1, IN_LS VIN = 3.6 V; All rails disabled. TJ = 0°C to 85°C 5 µA ISUSPEND SUSPEND current, total current into IN_BIAS, IN_DCDCx, IN_LDO1, IN_LS VIN = 3.6 V; DCDC3 enabled, low-power mode, no load. All other rails disabled. TJ = 0°C to 105°C 220 µA SYS_BU VSYS_BU SYS_BU voltage range Powered from VIN_BU or VCC 2.2 5.5 V CSYS_BU Recommended SYS_BU capacitor Ceramic, X5R or X7R, see Table 6-3. 1 µF Tolerance Ceramic, X5R or X7R, rated voltage ≥ 6.3 V –20% 20% INT_LDO VINT_LDO Output voltage 2.5 V DC accuracy IOUT < 10 mA –2% 2% IOUT Output current range Maximum allowable external load 0 10 mA ILIMIT Short circuit current limit Output shorted to GND 23 mA tHOLD Hold-up time Measured from VINT_LDO = to VINT_LDO = 1.8 V All rails enabled before power off, IN_BIAS tied to IN_DCDC1-4, IN_LDO1 VIN_BIAS = 2.8 V to 0 V in < 5 µs No external load on INT_LDO CINT_LDO = 1 µF, see Table 6-3. 150 ms COUT Nominal output capacitor value Ceramic, X5R or X7R, see Table 6-3. 0.1 1 22 µF Tolerance Ceramic, X5R or X7R, rated voltage ≥ 6.3 V –20% 20% DCDC1 (1.1-V BUCK) VIN_DCDC1 Input voltage range VIN_BIAS > VUVLO 5.5 V VDCDC1 Output voltage range Adjustable through I2C 0.85 1.675 V DC accuracy 2.7 V ≤ VIN ≤ 5.5 V; 0 A ≤ IOUT ≤ 1.8 A –2% 2% IOUT Continuous output current VIN_DCDC1 > 2.7 V 1.8 A IQ Quiescent current Total current from IN_DCDC1 pin; Device not switching, no load 25 50 µA RDS(ON) High-side FET on resistance VIN_DCDC1 = 3.6 V 230 355 mΩ Low-side FET on resistance VIN_DCDC1 = 3.6 V 90 145 ILIMIT High-side current limit VIN_DCDC1 = 3.6 V 2.8 A Low-side current limit VIN_DCDC1 = 3.6 V 3.1 VPG Power-good threshold VOUT falling STRICT = 0b 88.5% 90% 91.5% STRICT = 1b 96% 96.5% 97% Hysteresis VOUT rising STRICT = 0b 3.8% 4.1% 4.4% STRICT = 1b 0.25% Deglitch VOUT falling STRICT = 0b 1 ms STRICT = 1b 50 µs VOUT rising STRICT = 0b 10 µs STRICT = 1b 10 µs Time-out 5 ms |
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