ADP1055ACPZ-R7 datasheet(51/140 Pages) AD

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Data Sheet

ADP1055

Rev. A | Page 51 of 140

TIMEOUT CONDITIONS

The SMBus specification, Version 2.0, includes three clock

stretching specifications related to timeout conditions. The

timeout conditions are described in the following sections.

TTIMEOUT

A timeout condition occurs if any single SCL clock pulse is held

low for longer than the TTIMEOUT MIN of 25 ms. Upon detecting the

timeout condition, the PMBus slave device has 10 ms to abort

the transfer, release the bus lines, and be ready to accept a new

start condition. The device initiating the timeout is required to

hold the SCL clock line low for at least TTIMEOUT MAX = 35 ms,

guaranteeing that the slave device is given enough time to reset

its communication protocol.

TLOW:SEXT

The TLOW:SEXT = 25 ms specification is defined as the cumulative

time that the SCL line is held low by the slave device in any one

message from the start to the stop condition. The PMBus slave

device is guaranteed by design not to violate this specification. If

the slave device violates this specification, the master is allowed

to abort the transaction in progress and issue a stop condition at

the conclusion of the byte transfer in progress.

TLOW:MEXT

The TLOW:MEXT = 10 ms specification is defined as the cumulative

time that the SCL line is held low by the master device in any one

byte of a message between the start-to-acknowledge, acknowledge-

to-acknowledge, or acknowledge-to-stop. If this specification is

violated, the PMBus device treats it as a timeout condition and

aborts the transfer. This check is not implemented in the ADP1055.

DATA TRANSMISSION FAULTS

Data transmission faults occur when two communicating devices

violate the PMBus communication protocol. The following

items are taken from the PMBus specification (Revision 1.2,

September 6, 2010). See the PMBus specification for more

information about each fault condition.

Corrupted Data, PEC (Item 10.8.1)

This item refers to parity error checking. The PMBus slave

device compares the received PEC byte with the calculated

expected PEC byte of each transmission, starting from the start

bit to the stop bit. If the comparison fails, it responds as follows:



Send a no acknowledge (NACK) for the PEC byte.



Flush and ignore the received command and data.



Set the CML bit (Bit 1) in the STATUS_BYTE register.



Set the PEC bit (Bit 5) in the STATUS_CML register.



Notify the host through SMBALRT, if enabled.

Sending Too Few Bits (Item 10.8.2)

Transmission is interrupted by a start or stop condition before a

complete byte (eight bits) has been sent. Not supported; any

transmitted data is ignored.

Reading Too Few Bits (Item 10.8.3)

Transmission is interrupted by a start or stop condition before a

complete byte (eight bits) has been read. Not supported; any

received data is ignored.

Hosts Sends or Reads Too Few Bytes (Item 10.8.4)

If a host ends a packet with a stop condition before the required

bytes are sent/received, it is assumed that the host intended to

stop the transfer. Therefore, the PMBus slave does not consider

this to be an error and takes no action, except to flush any

remaining bytes in the transmit FIFO.

Host Sends Too Many Bytes (Item 10.8.5)

If a host sends more bytes than are expected for the corresponding

command, the PMBus slave considers this a data transmission

fault and responds as follows:



Send a no acknowledge (NACK) for all unexpected bytes as

they are received.



Flush and ignore the received command and data.



Sets the CML bit (Bit 1) in the STATUS_BYTE register.



Set the invalid/unsupported data bit (Bit 6) in the

STATUS_CML register.



Notify the host through SMBALRT, if enabled.

Host Reads Too Many Bytes (Item 10.8.6)

If a host reads more bytes than are expected for the corresponding

command, the PMBus slave considers this a data transmission

fault and responds as follows:



Send all 1s (0xFF) as long as the host continues to request

data.



Set the CML bit (Bit 1) in the STATUS_BYTE register.



Set the Other bit (Bit 1) in the STATUS_CML register.



Notify host through SMBALRT, if enabled.

Device Busy (Item 10.8.7)

PMBus slave device is too busy to respond to a request from the

master device. This error can occur if the slave device is busy

accessing the EEPROM (for example, erasing a page, downloading

from EEPROM, or uploading to EEPROM). The PMBus slave

considers this a data transmission fault and responds as follows:



Send an acknowledge (ACK) for the address byte.



Send a no acknowledge (NACK) for the command and

data bytes.



Send all 1s (0xFF) as long as the host continues to request

data.



Set the busy bit (Bit 7) in the STATUS_BYTE register.



Notify the host through SMBALRT, if enabled.

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