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ADP1055ACPZ-R7 Folha de dados(PDF) 32 Page - Analog Devices |
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ADP1055ACPZ-R7 Folha de dados(HTML) 32 Page - Analog Devices |
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32 / 140 page ![]() ADP1055 Data Sheet Rev. A | Page 32 of 140 AVERAGE CONSTANT CURRENT MODE The ADP1055 supports constant current (CC) mode. The constant current mode threshold is set in one of two ways: Using the PMBus definition of CC mode (Register 0xFE4F[2] = 0) Using the manufacturer specific CC mode (Register 0xFE4F[2] = 1) In both modes, the constant current limit can be set as a percentage of the IOUT_OC_FAULT_LIMIT—for example, ±3.125%, ±6.25%, ±12.5%, ±25%, ±50%, or ±100%—using Register 0xFE5D[3:0]. In the PMBus definition of CC mode, the constant current mode is activated on a IOUT_OC_FAULT fault, and the load current is limited to the CC limit, as specified in Register 0xFE5D[3:0]. Only positive percentages are applicable when the PMBus definition of CC mode is used. The fault responses to IOUT_OC_FAULT in this case are defined as per the PMBus format. The system enters CC mode on detection of the CS2 current (~2.6 ms, 12-bit averaging of CS2 ADC). Any further changes in the current while the device is in CC mode take place according to the averaging speed selectable in Register 0xFE4F[7]. For CC mode to work properly using the PMBus faults, the IOUT_OC_FAULT debounce must be set to 0 ms. In the manufacturer specific CC mode, the CC limit is exactly the limit that is programmed, and there is no need to trip the IOUT_OC_FAULT before entering CC mode. Fault responses to IOUT_OC_FAULT in this case are to ignore the fault or to shut down the device in response to the fault (Register 0x47[7:6] = 11). Other settings programmed in the response section (for example, Register 0x47[7:6] = 00, 01, or 10) are ignored. Below the IOUT_OC_FAULT_LIMIT threshold, the ADP1055 operates in constant voltage mode, using the output voltage as the feedback signal for closed-loop operation. When the ADP1055 crosses the constant current mode threshold, the CS2 current reading is used to control the output voltage regulation point. The output voltage is ramped down linearly as the load increases to ensure that the load current remains constant. Figure 51. Typical Characteristics in Constant Current (CC) Mode The constant current control loop has relatively low bandwidth because the current is averaged over a 328 μs period (9-bit decimation of the CS2 bit stream). The output voltage changes at a maximum rate of 1.18 V/sec at the VS± pins; therefore, the instantaneous value of the current can exceed the constant current limit for a very short period of time, depending on the severity of the transient condition. For a faster dynamic response of the constant current mode, the turbo mode can be used. In turbo mode, the averaging time can be decreased to a period of ~41 μs (6-bit decimation of the CS2 bit stream). In turbo mode, the slew rate of the output voltage can be programmed using Register 0xFE5D[5:4]. As the output voltage is reduced to maintain a constant load current, xxx_FAULT_RESPONSE (for example, Register 0x47[7:6] = 01) can be used to program a fault response when the output voltage falls below a specific threshold set by IOUT_OC_LV_LIMIT (Register 0x48). It is important to note that although constant current mode can be applied to any current fault (input or output current) according to the PMBus specification, the ADP1055 applies the constant current mode only to maintain a constant output current. For example, if the IOUT_UC_FAULT is programmed to enter constant current mode, the ADP1055 does not boost the output voltage to maintain the current level set by IOUT_UC_LIMIT. Using the manufacturer specific fault response for constant current mode, the system can be forced into constant current mode at a specific threshold, and if this threshold persists for a specified amount of time (based on the debounce time), the IOUT_OC_FAULT is tripped (see Figure 52). Figure 52. Constant Current with Hiccup 32-BIT KEY CODE The ADP1055 supports a 32-bit password (key code) in addition to the EEPROM password set by Register 0xD5. This 32-bit key code enables another level of protection for the user and the manufacturer to limit access to certain commands and operations. VOUT IOUT (0,0) IOUT_OC_FAULT_LIMIT VOUT NOMINAL IOUT_OC_FAST CC LIMIT IOUT_OC_FAULT_LIMIT TIME IOUT NOMINAL IOUT_OC_ DEBOUNCE STARTS IOUT_OC_ DEBOUNCE STARTS CONVERTER STARTS AFTER RETRY ATTEMPT IOUT_OC_DEBOUNCE ENDS AND FAULT TRIPS HICCUP IOUT_OC_ DEBOUNCE STARTS DEPENDENT ON SLEW RATE AND CC TURBO MODE |
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