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HD6433636SW Folha de dados(PDF) 198 Page - Renesas Technology Corp |
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HD6433636SW Folha de dados(HTML) 198 Page - Renesas Technology Corp |
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198 / 418 page ![]() 184 Block Diagram: Figure 9.6 shows a block diagram of timer G. Legend: PSS TMG ICRGF TCG ICRGR IRRTG ø Level sense circuit Noise canceller circuit Edge sense circuit ø /2 TMIG NCS W TMG: TCG: ICRGF: ICRGR: IRRTG: NCS: PSS: Timer mode register G Timer counter G Input capture register GF Input capture register GR Timer G interrupt request flag Noise canceller select Prescaler S Figure 9.6 Block Diagram of Timer G Pin Configuration: Table 9.8 shows the timer G pin configuration. Table 9.8 Pin Configuration Name Abbrev. I/O Function Input capture input TMIG Input Input capture |
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