HD6433636SW datasheet(93/418 Pages) RENESAS

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Section 4 Clock Pulse Generators

4.1

Overview

Clock oscillator circuitry (CPG: clock pulse generator) is provided on-chip, including both a

system clock pulse generator and a subclock pulse generator. The system clock pulse generator

consists of a system clock oscillator and system clock dividers. The subclock pulse generator

consists of a subclock oscillator circuit and a subclock divider.

4.1.1

Block Diagram

Figure 4.1 shows a block diagram of the clock pulse generators.

System clock

oscillator

System clock

divider (1/2)

Subclock

oscillator

Subclock

divider

(1/2, 1/4, 1/8)

System clock

divider (1/8)

System clock pulse generator

Subclock pulse generator

Prescaler S

(13 bits)

Prescaler W

(5 bits)

OSC

øOSC

)

OSC

øW

(f )

OSC

ø /2

ø /8

øSUB

ø/2

ø/8192

/128

/16

OSC

ø /4

øW

øOSC

Figure 4.1 Block Diagram of Clock Pulse Generators

4.1.2

System Clock and Subclock

The basic clock signals that drive the CPU and on-chip peripheral modules are ø and ø

SUB. Four of

the clock signals have names: ø is the system clock, ø

SUB is the subclock, øOSC is the oscillator

clock, and ø

W is the watch clock.

The clock signals available for use by peripheral modules are ø

OSC, ø/2, ø/4, ø/8, ø/16, ø/32, ø/64,

ø/128, ø/256, ø/512, ø/1024, ø/2048, ø/4096, ø/8192, ø

W, øW/2, øW/4, øW/8, øW/16, øW/32, øW/64,

and ø

W/128. The clock requirements differ from one module to another.

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