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HD6433636SW Folha de dados(PDF) 57 Page - Renesas Technology Corp |
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HD6433636SW Folha de dados(HTML) 57 Page - Renesas Technology Corp |
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57 / 418 page ![]() 43 2.6.2 Access to On-Chip Peripheral Modules On-chip peripheral modules are accessed in two states or three states. The data bus width is 8 bits, so access is by byte size only. This means that for accessing word data, two instructions must be used. Two-state access to on-chip peripheral modules Figure 2.12 shows operation timings for accessing on-chip peripheral modules in 2 states. T1 state Bus cycle T2 state ø or ø Internal address bus Internal read signal Internal data bus (read access) Internal write signal Read data Address Write data Internal data bus (write access) SUB Figure 2.12 On-Chip Peripheral Module Access Cycle (2-State Access) Three-state access to on-chip peripheral modules Figure 2.13 shows operation timings for accessing on-chip peripheral modules in 3 states. |
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