HD6433636SW datasheet(75/418 Pages) RENESAS

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3.3.2

Interrupt Control Registers

Table 3.3 lists the registers that control interrupts.

Table 3.3

Interrupt Control Registers

Name

Abbreviation

R/W

Initial Value

Address

Interrupt edge select register

IEGR

R/W

H'60

H'FFF2

Interrupt enable register 1

IENR1

R/W

H'00

H'FFF3

Interrupt enable register 2

IENR2

R/W

H'01

H'FFF4

Interrupt request register 1

IRR1

R/W*

H'20

H'FFF6

Interrupt request register 2

IRR2

R/W*

H'01

H'FFF7

Wakeup interrupt request register

IWPR

R/W*

H'00

H'FFF9

Note: * Write is enabled only for writing of 0 to clear a flag.

Interrupt Edge Select Register (IEGR)

Bit

76543210

—

IEG4

IEG3

IEG2

IEG1

IEG0

Initial value

01100000

Read/Write

—

R/W

IEGR is an 8-bit read/write register, used to designate whether pins

IRQ

0 to IRQ4 are set to rising

edge sensing or falling edge sensing.

Bit 7—Reserved Bit: Bit 7 is reserved: it is always read as 0, and should be used cleared to 0.

Bits 6 and 5—Reserved Bits: Bits 6 and 5 are reserved; they are always read as 1, and cannot be

modified.

Bit 4—IRQ

4 Edge Select (IEG4): Bit 4 selects the input sensing of pin IRQ4/ADTRG .

Bit 4: IEG4

Description

Falling edge of

IRQ

4/ ADTRG pin input is detected

(initial value)

Rising edge of

IRQ

4/ ADTRG pin input is detected

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